LTC1760 datasheet(32/44 Pages) LINER

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LTC1760

1760f

–

CB1

CB2

CSN

1760 F07

VREF

VSET

RVSET

7.2k

RVF

405.3k

∆Σ

MODULATOR

SWV

ITH

DAC

VALUE

(11 BITS)

Figure 7. Voltage DAC Operation

–

1760 F08

VREF

ISET

RSET

18.77k

∆Σ

MODULATOR

ITH

DAC

VALUE

(10 BITS)

CSET

(VCSP – VCSN)

3kΩ

(FROM CA1 AMPLIFIER)

Figure 8. Current Dac Operation

VPLUS and 2µF on VCC, including tolerances) should keep

the LTC1760 operating above the UVLO trip voltage long

enough to perform the short-circuit function when the

input voltages are greater than 8V. Increasing the capaci-

tor across VCC to 4.7µF will allow operation down to the

recommended 6V minimum.

8.3 Emergency Turn-Off

All of the PowerPath switches can be forced off by setting

the DCDIV pin to a voltage between 8V and 10V. This will

have the same effect as a short-circuit event. DCDIV must

be less than 5V and VPLUS must decrease below the UVLO

threshold to re-enable the PowerPath switches. The

LTC1760 can recover from this condition without remov-

ing power. Contact Applications Engineering for more

information.

8.4 Power-Up Strategy

All three PowerPath switches are turned on after VPLUS

exceeds the UVLO threshold for more than 250ms. This

delay is to prevent oscillation from a turn-on transient near

the UVLO threshold.

9 The Voltage DAC Block

The voltage DAC (VDAC) is a delta-sigma modulator which

controls the effective value of an internal resistor,

RVSET = 7.2k, used to program the maximum charger

voltage. Figure 7 is a simplified diagram of the VDAC

operation. The delta-sigma modulator and switch SWV

convert the VDAC value to a variable resistance equal to

(11/8)RVSET/(VDAC(VALUE)/2047). In regulation, VSET is

servo driven to the 0.8V reference voltage, VREF.

OPERATIO

Capacitors CB1 and CB2 are used to average the voltage

present at the VSET pin as well as provide a zero in the

voltage loop to help stability and transient response time

to voltage variations.

10 The Current DAC Block

The current DAC is a delta-sigma modulator which

controls the effective value of an internal resistor,

RSET = 18.77k, used to program the maximum charger

current. Figure 8 is a simplified diagram of the DAC opera-

tion. The delta-sigma modulator and switch convert the

IDAC value to a variable resistance equal to 1.25RSET/

(IDAC(VALUE)/1023). In regulation, ISET is servo driven to

the 0.8V reference voltage, VREF, and the current from RSET

is matched against a current derived from the voltage

between pins CSP and CSN. This current is (VCSP – VCSN)/

3k.

Therefore programmed current is:

ICHG = 0.8 VREF 3k/(RSNS RSET) • (IDAC(VALUE)/1023)

= (102.3mV/RSNS) • (IDAC(VALUE)/1023)

During wake-up current operation, the current DAC enters

a low current mode. The current DAC output is pulse-width

modulated with a high frequency clock having a duty cycle

value of 1/8. Therefore, the maximum output current pro-

vided by the charger is IMAX/8.Thedelta-sigmaoutputgates

this low duty cycle signal on and off. The delta-sigma shift

registers are then clocked at a slower rate, about 40ms/bit,

so that the charger has time to settle to the IMAX/8 value.

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