LTC2494 datasheet(32/36 Pages) LINER

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LTC2494

2494fb

APPLICATIONS INFORMATION

The user can expect to achieve this level of performance

using the internal oscillator, as shown in Figures 23, 24,

and 25. Measured values of normal mode rejection are

shown superimposed over the theoretical values in all

three rejection modes.

Traditional high order delta-sigma modulators suffer

from potential instabilities at large input signal levels.

The proprietary architecture used for the LTC2494 third

order modulator resolves this problem and guarantees

stability with input signals 150% of full-scale. In many

industrial applications, it is not uncommon to have mi-

crovolt level signals superimposed over unwanted volt

level error sources with several volts of peak-to-peak

noise. Figures 26 and 27 show measurement results for

the rejection of a 7.5V peak-to-peak noise source (150%

of full scale) applied to the LTC2494. From these curves,

it is shown that the rejection performance is maintained

even in extremely noisy environments.

Using the 2x speed mode of the LTC2494 alters the rejec-

tion characteristics around DC and multiples of fS. The

device bypasses the offset calibration in order to increase

the output rate. The resulting rejection plots are shown

in Figures 28 and 29. 1x type frequency rejection can be

achieved using the 2x mode by performing a running

average of the conversion results (see Figure 30).

Output Data Rate

When using its internal oscillator, the LTC2494 produces up

to 15 samples per second (sps) with a notch frequency of

60Hz. The actual output data rate depends upon the length

of the sleep and data output cycles which are controlled

by the user and can be made insigniﬁcantly short. When

operating with an external conversion clock (FO connected

to an external oscillator), the LTC2494 output data rate

can be increased. The duration of the conversion cycle is

41036/fEOSC. If fEOSC = 307.2kHz, the converter behaves

as if the internal oscillator is used.

An increase in fEOSCoverthenominal307.2kHzwilltranslate

into a proportional increase in the maximum output data

rate (up to a maximum of 100sps). The increase in output

rate leads to degradation in offset, full-scale error, and ef-

fective resolution as well as a shift in frequency rejection.

When using the integrated temperature sensor, the internal

Figure 23. Input Normal Mode Rejection vs Input Frequency with

Input Perturbation of 100% (60Hz Notch)

Figure 24. Input Normal Mode Rejection vs Input Frequency with

Input Perturbation of 100% (50Hz Notch)

Figure 25. Input Normal Mode Rejection vs Input Frequency with

Input Perturbation of 100% (50Hz/60Hz Notch)

INPUT FREQUENCY (Hz)

105 120 135 150 165 180 195 210 225 240

2494 F23

–20

–40

–60

–80

–100

–120

VCC = 5V

VREF = 5V

VIN(CM) = 2.5V

VIN(P-P) = 5V

TA = 25°C

MEASURED DATA

CALCULATED DATA

INPUT FREQUENCY (Hz)

12.5

37.5

62.5

87.5 100 112.5 125 137.5 150 162.5 175 187.5 200

2494 F24

–20

–40

–60

–80

–100

–120

VCC = 5V

VREF = 5V

VIN(CM) = 2.5V

VIN(P-P) = 5V

TA = 25°C

MEASURED DATA

CALCULATED DATA

INPUT FREQUENCY (Hz)

100

120

140

160

180

200

220

2494 F25

–20

–40

–60

–80

–100

–120

VCC = 5V

VREF = 5V

VIN(CM) = 2.5V

VIN(P-P) = 5V

TA = 25°C

MEASURED DATA

CALCULATED DATA

oscillator should be used (FO = 0) or an external oscillator

applied to FO, fEOSC, should be set to 307.2kHz Max.

A change in fEOSC results in a proportional change in the

internal notch position. This leads to reduced differential

mode rejection of line frequencies. The common mode

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