LTC2902-2IGN datasheet(7/16 Pages) LINER

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LTC2902

2902f

PI FU CTIO S

COMP3 (Pin 1): Comparator Output 3. Nondelayed, active

high logic output with weak pull-up to V2. Pulls high when

V3 is above reset threshold. May be pulled greater than V2

using external pull-up.

COMP1 (Pin 2): Comparator Output 1. Nondelayed, active

high logic output with weak pull-up to V2. Pulls high when

V1 is above reset threshold. May be pulled greater than V2

using external pull-up.

V3 (Pin 3): Voltage Input 3. Select from 2.5V, 1.8V, 1.5V

or ADJ. See Table 1 for details.

V1 (Pin 4): Voltage Input 1. Select from 5V or 3.3V. See

Table 1 for details. The greater of (V1, V2) is also VCC for

the chip. Bypass this pin to ground with a 0.1

µF (or

greater) capacitor.

CRT (Pin 5): Reset Delay Time Programming Pin. Attach

an external capacitor (CRT) to GND to set a reset delay time

of 4.6ms/nF. Leaving the pin open generates a minimum

delay of approximately 50

µs. A 47nF capacitor will gener-

ate a 216ms reset delay time.

TYPICAL PERFOR A CE CHARACTERISTICS

RST Pull-Up Current vs V2

(LTC2902-1)

RST Pull-Up Current vs V2

(LTC2902-2)

INPUT OVERDRIVE ABOVE THRESHOLD (mV)

250

200

V1, V2

V3, V4

150

2902 G22

100

1000

100

TA = 25°C

V2 (V)

2.5

3.5

2902 G23

4.5

TA = 25°C

VRT25

VRT30

VRT33

V2 (V)

2.5

3.5

2902 G24

4.5

TA = 25°C

VRT25

VRT30

VRT33

COMPX Propagation Delay vs

Input Overdrive Above Threshold

COMPX Pull-Up Current

vs V2 (COMPX Held at 0V)

V2 (V)

3.5

2902 G21

1.5

2.5

4.5

TA = 25°C

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