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LTC3440 Datasheet(PDF) 14 Page - Linear Technology |
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LTC3440 Datasheet(HTML) 14 Page - Linear Technology |
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14 / 20 page ![]() 14 LTC3440 3440fb APPLICATIO S I FOR ATIO Short-Circuit Improvements The LTC3440 is current limited to 2.7A peak to protect the IC from damage. At input voltages above 4.5V a current limit condition may produce undesirable voltages to the IC due to the series inductance of the package, as well as the Figure 8. Error Amplifier with Type III Compensation 1.22V R1 R2 3440 F08 FB 9 VC CP1 CZ1 RZ VOUT 10 CP2 – + ERROR AMP Figure 7. Error Amplifier with Type I Compensation 1.22V R1 R2 3440 F07 FB 9 VC CP1 VOUT 10 – + ERROR AMP f eR C Hz Which is extremely close to DC f RC Hz f RC Hz f RC Hz POLE P ZERO ZP ZERO Z POLE ZP 1 3 1 1 1 2 1 2 2 1 232 1 1 2 1 21 1 2 ≈ π = π = π = π •• • • •• • •• • •• • traces and external components. Following the recom- mendations for output voltage >4.3V and input voltage >4.5V will improve this condition. Additional short-circuit protection can be accomplished with some external cir- cuitry. In an overload or short-circuit condition the LTC3440 voltage loop opens and the error amp control voltage on the VC pin slams to the upper clamp level. This condition forces boost mode operation in order to attempt to provide more output voltage and the IC hits a peak switch current limit of 2.7A. When switch current limit is reached switches B and D turn on for the remainder of the cycle to reverse the volts • seconds on the inductor. Although this prevents current run away, this condition produces four switch operation producing a current foldback characteristic and the average input current drops. The IC is trimmed to guarantee greater than 1A average input current to meet the maximum load demand, but in a short-circuit or overload condition the foldback characteristic will occur producing higher peak switch currents. To minimize this affect during this condition the following circuits can be utilized. Restart Circuit For a sustained short-circuit the circuit in Figure 9 will force a soft-start condition. The only design constraint is that R2/C2 time constant must be longer than the soft- start components R1/C1 to ensure start-up. Figure 9. Soft-Start Reset Circuitry for a Sustained Short-Circuit C2 10nF C1 4.7nF R2 1M R1 1M VOUT VIN SOFT-START SO/SS M2 NMOS VN2222 M1 NMOS VN2222 D1 1N4148 3440 F09 |
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