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BQ2014SN Datasheet(PDF) 2 Page - Texas Instruments |
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BQ2014SN Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 22 page  Pin Descriptions LCOM LED common output Open-drain output switches VCC to source current for the LEDs. The switch is off dur- ing initialization to allow reading of the soft pull-up or pull-down programming resistors. LCOM is also in a high impedance state when the display is off. SEG1– SEG5 LED display segment outputs (dual func- tion with PROG1—PROG5) Each output may activate an LED to sink the current sourced from LCOM. PROG1– PROG5 Programmed full count selection imputs (dual function with SEG1—SEG5) These three-level input pins define the pro- grammed full count (PFC) thresholds de- scribed in Table 2. PROG3– PROG4 Gas gauge rate selection inputs (dual function with SEG3—SEG4) These three-level input pins define the pro- grammed full count (PFC) thresholds de- scribed in Table 2. PROG5 Self-discharge rate selection (dual func- tion with SEG5) This three-level input pin defines the self- discharge compensation rate shown in Ta- ble 1. CHG Charge control output This open-drain output becomes active high when charging is allowed. DONE Fast charge complete This input is used to communicate the status of an external charge controller such as the bq2004 Fast Charge IC. Note: This pin must be pulled down to VSS using a 200K Ω resistor. SR Sense resistor input The voltage drop (VSR) across the sense re- sistor RS is monitored and integrated over time to interpret charge and discharge activ- ity. The SR input is tied to the high side of the sense resistor. VSR <VSS indicates dis- charge, and VSR >VSS indicates charge. The effective voltage drop VSRO, as seen by the bq2014, is VSR +VOS (see Table 5). DISP Display control input DISP high disables the LED display. DISP tied to VCC allows PROGX to connect di- rectly to VCC or VSS instead of through a pull-up or pull-down reistor. DISP floating allows the LED display to be active during a valid charge or during discharge if the NAC register is updated at a rate equiva- lent to VSRO ≤ -4mV. DISP low activates the display. See Table 1. SB Secondary battery input This input monitors the single-cell voltage potential through a high-impedance resis- tive divider network for the end-of-discharge voltage (EDV) thresholds,maximum charge voltage (MCV), and battery removed. EMPTY Battery empty output This open-drain output becomes high- impedance on detection of a valid final end- of-discharge voltage (VEDVF) and is low fol- lowing the next application of a valid charge. DQ Serial I/O pin This is an open-drain bidirectional pin. REF Voltage reference output for regulator REF provides a voltage reference output for an optional micro-regulator. VCC Supply voltage input VSS Ground 2 bq2014 |
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