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BQ4285LP Datasheet(PDF) 23 Page - Texas Instruments |
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BQ4285LP Datasheet(HTML) 23 Page - Texas Instruments |
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23 / 32 page ![]() 23 Power-Down/Power-Up Timing—bq4285L (TA = TOPR) Symbol Parameter Minimum Typical Maximum Unit Conditions tF VCC slew from 2.7V to 0V 300 - - µs tR VCC slew from 0V to 2.7V 100 - - µs tCSR CS at VIH after power-up 20 - 200 ms Internal write-protection period after VCC passes VPFD on power-up. tWPT Write-protect time for ex- ternal RAM -0 - VBC > VPFD 10 16 30 µsVBC < VPFD tCER Chip enable recovery time tCSR - tCSR ms Time during which external SRAM is write-protected after VCC passes VPFD on power-up. tCED Chip enable propagation delay to external SRAM - 9 15 ns Caution: Negative undershoots below the absolute maximum rating of -0.3V in battery-backup mode may affect data integrity. Power-Down/Power-Up Timing—bq4285L bq4285E/L |
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