CD4049 datasheet(7/18 Pages) TI

7 / 18 page

FIGURE 12. TYPICAL POWER DISSIPATION vs INPUT RISE

AND FALL TIMES PER INVERTER FOR CD4050B

Typical Performance Curves (Continued)

106

104

103

102

103

104

105

TA = 25

tr, tf, INPUT RISE AND FALL TIME (ns)

SUPPLY VOLTAGE VCC = 5V FREQUENCY (f) = 10kHz

106

107

108

105

15V; 1MHz

15V; 100kHz

10V; 100kHz

15V; 10kHz

10V; 10kHz

15V; 1kHz

Test Circuits

FIGURE 13. QUIESCENT DEVICE CURRENT TEST CIRCUIT

NOTE: Test any one input with other inputs at VCC or VSS.

FIGURE 14. INPUT VOLTAGE TEST CIRCUIT

NOTE: Measure inputs sequentially, to both VCC and VSS connect

all unused inputs to either VCC or VSS.

FIGURE 15. INPUT CURRENT TEST CIRCUIT

In Terminal - 3, 5, 7, 9, 11, or 14

Out Terminal - 2, 4, 6, 10, 12 or 15

VCC Terminal - 1

VSS Terminal - 8

FIGURE 16. LOGIC LEVEL CONVERSION APPLICATION

IDD

VCC

INPUTS

VSS

VCC

VSS

VCC

OUTPUTS

INPUTS

VIH

VIL

VSS

DVM

VCC

OUTPUTS

INPUTS

VCC

VSS

VCC = 5V

OUTPUT

INPUTS

10V = VIH

0 = VIL

VSS

TO DTL/TTL

CMOS 10V LEVEL TO DTL/TTL 5V LEVEL

COS/MOS

0 = VOL

5V = VOH

CD4049

CD4049UB, CD4050B

CD4049 Datasheet(PDF) 7 Page - Texas Instruments

CD4049 Datasheet(HTML) 7 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

Datasheet Download

Link URL