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LTC4006 Datasheet(PDF) 18 Page - Linear Technology

Part # LTC4006
Description  4A, High Efficiency, Standalone Li-Ion Battery Charger
PDF  20 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC4006 Datasheet(HTML) 18 Page - Linear Technology

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LTC4006
4006fa
Figure 14. Kelvin Sensing of Charging Current
CSP
4006 F14
DIRECTION OF CHARGING CURRENT
RSNS
BAT
4. Place the output current sense resistor right next to
the inductor output but oriented such that the IC’s
current sense feedback traces going to resistor are not
long. The feedback traces need to be routed together
as a single pair on the same layer at any given time with
smallest trace spacing possible. Locate any filter
component on these traces next to the IC and not at the
sense resistor location.
5. Place output capacitors next to the sense resistor
output and ground.
6. Output capacitor ground connections need to feed
into same copper that connects to the input capacitor
ground before tying back into system ground.
General Rules
7. Connection of switching ground to system ground or
internal ground plane should be single point. If the
system has an internal system ground plane, a good
way to do this is to cluster vias into a single star point
to make the connection.
8. Route analog ground as a trace tied back to IC ground
(analog ground pin if present) before connecting to
any other ground. Avoid using the system ground
plane. CAD trick: make analog ground a separate
ground net and use a 0
Ω resistor to tie analog ground
to system ground.
9. A good rule of thumb for via count for a given high
current path is to use 0.5A per via. Be consistent.
10. If possible, place all the parts listed above on the same
PCB layer.
11. Copper fills or pours are good for all power connec-
tions except as noted above in Rule 3. You can also use
copper planes on multiple layers in parallel too—this
helps with thermal management and lower trace in-
ductance improving EMI performance further.
12. For best current programming accuracy provide a
Kelvin connection from RSENSE to CSP and BAT. See
Figure 13 as an example.
It is important to keep the parasitic capacitance on the RT,
CSP and BAT pins to a minimum. The traces connecting
these pins to their respective resistors should be as short
as possible.
APPLICATIO S I FOR ATIO



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