2

Functional Diagram

SPE

CP

MR

PE

TE

9

2

1

7

10

3456

14

13

12

11

15

Q0

Q1

Q2

Q3

TC

P0

P1

P2

P3

MODE SELECT - FUNCTION TABLE FOR CD74HC/HCT161

OPERATING MODE

INPUTS

OUTPUTS

MR

CP

PE

TE

SPE

TC

Reset (Clear)

L

XXXXX

L

L

Parallel Load

H

↑

XX

l

l

L

L

H

↑

X

X

l

h

H

(Note 3)

Count

H

↑

h

h

h (Note 5)

X

Count

(Note 3)

Inhibit

H

X

I (Note 4)

X

h (Note 5)

X

(Note 3)

H

X

X

I (Note 4)

h (Note 5)

X

L

MODE SELECT - FUNCTION TABLE FOR CD74HC/HCT163

OPERATING MODE

INPUTS

OUTPUTS

MR

CP

PE

TE

SPE

TC

Reset (Clear)

l

↑

XXXX

L

L

Parallel Load

h (Note 5)

↑

XX

l

l

L

L

h (Note 5)

↑

X

X

l

h

H

(Note 3)

Count

h (Note 5)

↑

h

h

h (Note 5)

X

Count

(Note 3)

Inhibit

h (Note 5)

X

I (Note 4)

X

h (Note 5)

X

(Note 3)

h (Note 5)

X

X

I (Note 4)

h (Note 5)

X

L

NOTE: H = High voltage level steady state; L = Low voltage level steady state; h = High voltage level one setup time prior to the Low-to-High

clock transition; l = Low voltage level one setup time prior to the Low-to-High clock transition; X = Don’t Care; q = Lower case letters indicate

the state of the referenced output prior to the Low-to-High clock transition;

↑ = Low-to-High clock transition.

3. The TC output is High when TE is High and the counter is at Terminal Count (HHHH for CD74HC/HCT161 and CD74HC/HCT163).

4. The High-to-Low transition of PE or TE on the CD74HC/HCT161 and the CD74HC/HCT163 should only occur while CP is HIGH for con-

ventional operation.

5. The Low-to-High transition of SPE on the CD74HC/HCT161 and SPE or MR on the CD74HC/HCT163 should only occur while CP is HIGH

for conventional operation.

CD74HC161, CD74HCT161, CD74HC163, CD74HCT163