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HPC3130 Datasheet(PDF) 2 Page - Texas Instruments

Part # HPC3130
Description  PCI HOT PLUG CONTROLLER
PDF  40 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

HPC3130 Datasheet(HTML) 2 Page - Texas Instruments

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HPC3130
PCI HOT PLUG CONTROLLER
SCPS029B – DECEMBER1998
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
description
The Texas Instruments HPC3130 is a peripheral component interconnect (PCI) hot-plug controller, compliant
with
PCI Hot-Plug Specification, Revision 1.0. This device supports hot insertion/removal of up to four hot-plug
slots on a PCI bus, provides a 64-bit data path in any of the four hot-plug slots, and supports 66-MHz systems
for two slots.
The primary function of the HPC3130 is to allow noninterfering hot-plug slot connection/disconnection with the
other PCI devices on the bus. The HPC3130 provides automatic bus connection sequencing and supports a
protocol for connection during bus idle conditions. It also supports an interrupt pin to report hot-plug slot events.
The interrupt event status and enable state are compliant with the
Advanced Configuration and Power Interface
(ACPI) Specification.
Internal registers may be accessed through either a two-signal serial interface or a generic parallel bus. The
serial interface slave decoding circuit supports up to eight different controllers or other serial bus devices with
the same system base. Decoding through the parallel interface supports multiple controllers with external
chip-select logic. Two double-words of configuration and control registers are provided per slot. As a result, the
HPC3130 decodes an address range of 32 bytes.
An advanced complementary metal-oxide semiconductor (CMOS) process provides low system power
consumption while operating at PCI clock rates up to 66 MHz.
functional block diagram
A simplified block diagram of the HPC3130 is provided below. The block diagram illustrates the HPC3130
functionality on a per slot basis. The SMODE chip input, not shown, is used for terminal multiplexing of the serial
and parallel bus slave interfaces.
CS
Parallel
Bus
Slave
Interface
Serial Bus
Slave I/F
Switch
Timing
Control
and
Status
Registers
Slot
Power I/F
Card
Detection
CBT-Switch
Control
and
Slot Reset
Attention
Indicators
RD
WR
DATA 7–0
A 4–0
SDA
SCL
ADD 6–0
IDLEREQ
IDLEGNT
FRAME
IRDY
SREQ
SGNT
PCLK
PWRON/OFF
PWRFAULT
PWRGOOD
PRSNT2
PRSNT1
REQ64ON
REQ64ON
CLKON
SLOTRST
SLOTREQ64
ATTN0
ATTN1
SYSM66EN
INTR
PRST
BUSON
M66EN
DETECT
SYSTEM INTERFACE
SLOT INTERFACE



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