SN54HC595, SN74HC595

8-BIT SHIFT REGISTERS

WITH 3-STATE OUTPUT REGISTERS

SCLS041B – DECEMBER 1982 – REVISED MAY 1997

1

POST OFFICE BOX 655303

to 15 LSTTL Loads

Small-Outline (D) and Ceramic Flat (W)

Packages, Ceramic Chip Carriers (FK), and

Standard Plastic (N) and Ceramic (J)

300-mil DIPs

description

The ’HC595 contain an 8-bit serial-in, parallel-out

shift register that feeds an 8-bit D-type storage

register. The storage register has parallel 3-state

outputs. Separate clocks are provided for both the

shift and storage register. The shift register has a

direct overriding clear (SRCLR) input, serial

(SER) input, and serial outputs for cascading.

Both the shift register clock (RCLK) and storage

register clock (SRCLK) are positive-edge trig-

gered. If both clocks are connected together, the

shift register is always one clock pulse ahead of

the storage register.

The SN54HC595 is characterized for operation

over the full military temperature range of –55

°C

to 125

°C. The SN74HC595 is characterized for

operation from –40

°C to 85°C.

Copyright

© 1997, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

SN54HC595 ...J OR W PACKAGE

SN74HC595 ...D OR N PACKAGE

(TOP VIEW)

SN54HC595 . . . FK PACKAGE

(TOP VIEW)

NC – No internal connection

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

GND

SER

OE

RCLK

SRCLK

SRCLR

32 1 20 19

910 11 12 13

4

5

6

7

8

18

17

16

15

14

SER

OE

NC

RCLK

SRCLK

NC