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AI1003 Datasheet(PDF) 2 Page - A1 PROs co., Ltd. |
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AI1003 Datasheet(HTML) 2 Page - A1 PROs co., Ltd. |
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2 / 8 page ![]() 2 Ai1003 Pin Description No. Symbol I/O Description Input signal pin - control Vφ2 Input signal pin - control Vφ1 Input signal pin - control Vφ3 Input signal pin - control Vφ4 Input signal pin - control VSUB GND GND Power supply (+15V) VP1 VSUB 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Vφ4 Vφ3 VP0 Vφ1 Vφ2 VSS I I I I I I I - - O O O - O - Output signal pin - 3 level ( VP1, VP0, VSS) Power supply (0V) Output signal pin - 2 level ( VP0, VSS) Power supply (-8.5V) XV1 XSG1 XV3 XSG2 XV4 XV2 XSUB Block Diagram 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 Logic Truth Table Input Output Vφ1,3 Vφ2,4 VSUB XV1, 2 XSG1, 2 XV2, 4 XSUB L L H H L H L H VP1 VP0 *Z VSS L H L H VP0 VSS VP1 VSS * Z is high impedance . O Input signal pin - control Vφ1 Input signal pin - control Vφ3 Output signal pin - 3 level ( VP1, VP0, VSS) Output signal pin - 2 level ( VP0, VSS) Output signal pin - 2 level ( VP1, VSS) |
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