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LTC2215CUP Datasheet(PDF) 28 Page - Linear Technology |
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LTC2215CUP Datasheet(HTML) 28 Page - Linear Technology |
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28 / 36 page ![]() LTC2216/LTC2215 28 22165f Overflow Bit An overflow output bit (OF) indicates when the converter is over-ranged or under-ranged. In CMOS mode, a logic high on the OFA pin indicates an overflow or underflow on the A data bus, while a logic high on the OFB pin indicates an overflow on the B data bus. In LVDS mode, a differen- tial logic high on OF+/OF– pins indicates an overflow or underflow. Output Clock The ADC has a delayed version of the encode input avail- able as a digital output, CLKOUT. The CLKOUT pin can be used to synchronize the converter data to the digital system. This is necessary when using a sinusoidal en- code. In both CMOS modes, A bus data will be updated as CLKOUTA falls and CLKOUTB rises. In demultiplexed CMOS mode the B bus data will be updated as CLKOUTA falls and CLKOUTB rises. In Full Rate CMOS Mode, only the A data bus is active; data may be latched on the rising edge of CLKOUTA or the falling edge of CLKOUTB. In demultiplexed CMOS mode CLKOUTA and CLKOUTB will toggle at 1/2 the frequency of the encode signal. Both the A bus and the B bus may be latched on the rising edge of CLKOUTA or the falling edge of CLKOUTB. Digital Output Randomizer Interference from the ADC digital outputs is sometimes unavoidable. Interference from the digital outputs may be from capacitive or inductive coupling, or coupling through the ground plane. Even a tiny coupling factor can result in discernible unwanted tones in the ADC output spectrum. By randomizing the digital output before it is transmitted off chip, these unwanted tones can be randomized, trading a slight increase in the noise floor for a large reduction in unwanted tone amplitude. The digital output is “Randomized” by applying an exclu- sive-OR logic operation between the LSB and all other data output bits. To decode, the reverse operation is applied; that is, an exclusive-OR operation is applied between the LSB and all other bits. The LSB, OF and CLKOUT output are not affected. The output Randomizer function is active when the RAND pin is high. Output Driver Power Separate output power and ground pins allow the output drivers to be isolated from the analog circuitry. The power supply for the digital output buffers, OVDD, should be tied to the same power supply as for the logic being driven. For example, if the converter is driving a DSP powered by a 1.8V supply, then OVDD should be tied to that same 1.8V supply. In CMOS mode OVDD can be powered with any logic voltage up to the 3.6V. OGND can be powered with any voltage from ground up to 1V and must be less than OVDD. The logic outputs will swing between OGND and OVDD. In LVDS Mode, OVDD should be connected to a 3.3V supply and OGND should be connected to GND. Figure 14. Functional Equivalent of Digital Output Randomizer • • • CLKOUT OF D15 D0 D14 D0 D2 D0 D1 D0 D0 D0 D1 RAND = HIGH, SCRAMBLE ENABLED D2 D14 D15 OF CLKOUT RAND 22165 F14 LTC2216/LTC2215 APPLICATIONS INFORMATION |
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