TCM29C13, TCM29C14, TCM29C16, TCM29C17,

TCM129C13, TCM129C14, TCM129C16, TCM129C17

COMBINED SINGLE-CHIP PCM CODEC AND FILTER

SCTS011H – APRIL 1986 – REVISED JULY 1996

24

POST OFFICE BOX 655303

APPLICATION INFORMATION

output gain-set design considerations (see Figure 9)

PWRO+ and PWRO – are low-impedance complementary outputs. The voltages at the nodes are:

R1 and R2 are a gain-setting resistor network with the center tap to the GSR input.

A value greater than 10 k

Ω and less than 100 kΩ for R1 + R2 is recommended because of the following:

The total capacitance at the GSR input and the parallel combination of R1 and R2 define a time constant

that has to be minimized to avoid inaccuracies.

VOD = A × VA

where A =

1 + (R1/R2)

4 + (R1/R2)

PWRO+

GSR

PWRO –

2

4

3

R1

R2

VOD

VO

RL

PCM IN

TCM129C13

TCM129C14

TCM129C16

TCM129C17

TCM29C13

TCM29C14

TCM29C16

TCM29C17

VO–

Digital Milliwatt

Sequence Per

CCITT G. 711

Pin numbers shown are for the TCM29C13, TCM29C14, TCM129C13, and TCM129C14 package only.

Figure 10. Gain-Setting Configuration