THS1031

2.7 V – 5.5 V, 10-BIT, 30 MSPS

CMOS ANALOG-TO-DIGITAL CONVERTER

SLAS242A – NOVEMBER 1999 – REVISED JANUARY 2000

13

POST OFFICE BOX 655303

PRINCIPLES OF OPERATION

Table 1. Mode Selection

MODES

ANALOG INPUT

INPUT

SPAN

MODE

PIN

REFSENSE

PIN

VREF

PIN

REFTS

PIN

REFBS

PIN

FIGURE

AIN

1 V

AVDD

Short together

AGND

8, 15

Top/bottom

AIN

2 V

AVDD

AGND

Short together

AGND

9, 16

Top/bottom

AIN

1+Ra/Rb

AVDD

Mid Ra & Rb

Short together to Ra

AGND

10, 15, 16

AIN

External VREF

AVDD/2

AVDD

External

NC

AGND

10, 15, 16

AIN

1 V

AVDD/2

Short together

8, 14

Center span

AIN

2 V

AVDD/2

AGND

NC

Short together to the

9, 14

Center span

AIN

1+Ra/Rb

AVDD/2

Mid Ra & Rb

Ra

g

common mode voltage

10, 14

AIN

VREF

AVDD/2

AVDD

External

11, 14

External

reference

AIN

2 V max

AGND

See Note 1

See Note 1

Voltage within supply

(REFTS–REBS) = 2 V max

12, 13

Diff

ti l

AIN is input 1

REFTS & REFBS

1 V

AVDD/2

Short together

Differential

input

REFTS & REFBS

are shorted

2 V

AVDD/2

AGND

NC

Short together AVDD/2

17

in ut

are shorted

together for input 2

VREF

AVDD/2

AVDD

External

NOTE 1: In external reference mode, VREF can be available for external use with CENTER SPAN setup.

reference operations

REFSENSE

VREF

AGND

2 V

AVDD

The internal reference is disabled and an external reference should be connected to VREF pin if mode = AVDD/2

Short to VREF

1 V

Connect to Ra/Rb

1+Ra/Rb