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THS4031 Datasheet(PDF) 24 Page - Texas Instruments

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Part # THS4031
Description  100-MHz LOW-NOISE HIGH-SPEED AMPLIFIERS
PDF  38 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

THS4031 Datasheet(HTML) 24 Page - Texas Instruments

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THS4031, THS4032
100-MHz LOW-NOISE HIGH-SPEED AMPLIFIERS
SLOS224C – JULY 1999 – REVISED APRIL 2000
24
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
APPLICATION INFORMATION
optimizing frequency response (continued)
Table 1. Recommended Feedback Resistors
GAIN
Rf for VCC = ±15 V and ± 5 V
2
300
Ω
–1
360
Ω
5
3.3 k
Ω (low stray-c PCB only)
unity-gain concerns
THS403x was designed for extremely low noise with a minimum gain of 2 (–1). If the amplifier were to be
configured for unity gain, the output would tend to oscillate because the open-loop intersection on a Bode
diagram is at a –40 dB/decade slope instead of the –20 dB/decade slope required for stable operation. But, it
is sometimes desirable to have a low-noise unity gain buffer. There is a way to accomplish this feat with the
THS403x with some added complexity (see Figure 48). The lag compensation circuit shown in Figure 48
increases the noise gain of the amplifier without increasing the signal gain. Another way to look at this is that
the open-loop gain is effectively reduced by the 1 + RF/RC gain. This reduction causes the –40 dB/decade pole
to be shifted down into an open-loop gain of less than 1. The drawbacks of this circuit are the decreased
frequency response, the increased noise, and the increased output offset voltage (VOO). One way to eliminate
the VOO increase is to add a capacitor (CC) in series with RC, with the added requirement that the time constant
of CC and RC be set low enough for the Bode plot intersection to be at a –20 dB/decade slope. Typically, a 1
+ RF /RC gain of 2 to 3 yields a smooth frequency response for the THS403x. If CC is used, it is desirable to have
the 1/(2
π RCCC) frequency 5 to 10 times lower than the amplifier’s natural bandwidth. One additional advantage
this circuit provides is that it makes driving capacitive loads much easier. A capacitive load causes the
–40 dB/decade intersection (because of the phase lag), to be above unity gain, the same as described
previously. In general, this RC and CC modification can be used in both an inverting and noninverting
configuration with the same results.



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