THS5641A

8-BIT, 100 MSPS, CommsDAC

™

DIGITAL-TO-ANALOG CONVERTER

SLAS277 –MARCH 2000

15

POST OFFICE BOX 655303

APPLICATION INFORMATION

DAC transfer function

The THS5641A delivers complementary output currents IOUT1 and IOUT2. Output current IOUT1 equals the

approximate full-scale output current when all input bits are set high in mode 0 (straight binary input), i.e. the

binary input word has the decimal representation 255. For mode 1, the MSB is inverted (twos complement input

format). Full-scale output current will flow through terminal IOUT2 when all input bits are set low (mode 0,

straight binary input). The relation between IOUT1 and IOUT2 can thus be expressed as:

IOUT1

+ IOUT

IOUT1

+ IOUT

FS

CODE

256

IOUT2

+ IOUT

FS

(255

* CODE)

256

where CODE is the decimal representation of the DAC data input word. Output currents IOUT1 and IOUT2 drive

single-ended voltages VOUT1 and VOUT2 at terminal IOUT1 and IOUT2, respectively, of:

VOUT1

+ IOUT1

R

CODE

256

IOUT

FS

R

LOAD

VOUT2

+ IOUT2

R

(255–CODE)

256

IOUT

FS

R

LOAD

VOUT

(2CODE–255)

256

IOUT

FS

R

LOAD

The latter equation shows that applying the differential output will result in doubling of the signal power delivered

to the load. Since the output currents of IOUT1 and IOUT2 are complementary, they become additive when

processed differentially. Care should be taken not to exceed the compliance voltages at node IOUT1 and

IOUT2, which would lead to increased signal distortion.