TLC2932

HIGH-PERFORMANCE PHASE-LOCKED LOOP

SLAS097E – SEPTEMBER 1994 – REVISED MAY 1997

7

POST OFFICE BOX 655303

(unless otherwise noted)

VCO section

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VOH

High-level output voltage

IOH = – 2 mA

4

V

VOL

Low-level output voltage

IOL = 2 mA

0.5

V

VIT

Input threshold voltage at SELECT, VCO INHIBIT

1.5

2.5

3.5

V

II

Input current at SELECT, VCO INHIBIT

VI = VDD or GND

±1

µA

Zi(VCO IN)

Input impedance

VCO IN = 1/2 VDD

10

M

Ω

IDD(INH)

VCO supply current (inhibit)

See Note 4

0.01

1

µA

IDD(VCO)

VCO supply current

See Note 5

15

35

mA

NOTES:

4. Current into VCO VDD, when VCO INHIBIT = VDD, and PFD is inhibited.

5. Current into VCO VDD, when VCO IN = 1/2 VDD, RBIAS = 3.3 kΩ, VCO INHIBIT = GND, and PFD is inhibited.

PFD section

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VOH

High-level output voltage

IOH = 2 mA

4.5

V

VOL

Low-level output voltage

IOL = 2 mA

0.2

V

IOZ

High-impedance-state output current

PFD INHIBIT = high,

VI = VDD or GND

±1

µA

VIH

High-level input voltage at FIN–A, FIN–B

4.5

V

VIL

Low-level input voltage at FIN–A, FIN–B

1

V

VIT

Input threshold voltage at PFD INHIBIT

1.5

2.5

3.5

V

Ci

Input capacitance at FIN–A, FIN–B

5

pF

Zi

Input impedance at FIN–A, FIN–B

10

M

Ω

IDD(Z)

High-impedance-state PFD supply current

See Note 6

0.01

1

µA

IDD(PFD)

PFD supply current

See Note 7

0.15

3

mA

NOTES:

6. Current into LOGIC VDD, when FIN–A, FIN–B = GND, PFD INHIBIT = VDD, no load, and VCO OUT is inhibited.

7. Current into LOGIC VDD, when FIN–A, FIN–B = 1 MHz (VI(PP) = 5 V, rectangular wave), PFD INHIBIT = GND, no load, and

VCO OUT is inhibited.