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TLC32040 Datasheet(PDF) 13 Page - Texas Instruments |
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TLC32040 Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 30 page ![]() αVref CMRR rI VOO VOM dB dB dB dB TLC32040M ANALOG INTERFACE CIRCUIT POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 4–13 electrical characteristics over recommended operating free-air temperature range, VCC+ = 5 V, VCC– = –5 V, VDD = 5 V (unless otherwise noted) total device, MSTR CLK frequency = 5.184 MHz, outputs not loaded PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT VOH High-level output voltage VDD = 4.75 V, IOH = – 300 µA 2.4 V VOL Low-level output voltage VDD = 4.75 V, IOL = 2 mA 0.9 V ICC + Supply current from VCC+ 40 mA ICC – Supply current from VCC– –40 mA IDD Supply current from VDD fMSTR CLK = 5.184 MHz 7 mA Vref Internal reference output voltage 2.9 3.3 V Temperature coefficient of internal reference voltage 200 ppm/ °C ro Output resistance at REF 100 k Ω receive amplifier input PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT A/D converter offset error (filters bypassed) 25 65 mV A/D converter offset error (filters in) 25 65 mV Common-mode rejection ratio at IN +, IN –, or AUX IN+, AUX IN– See Note 7 35 55 dB Input resistance at IN +, IN – or AUX IN +, AUX IN –, REF 100 k Ω NOTE 7: The test condition is a 0-dBm, 1-kHz input signal with an 8-kHz conversion rate. transmit filter output PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT Output offset voltage at OUT+ or OUT– (single ended relative to ANLG GND) 15 75 mV Maximum peak output voltage swing between OUT+ and OUT– (differential output) RL ≥ 300 Ω ±6 V system distortion specifications, SCF clock frequency = 288 kHz PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT Attenuation of second harmonic of Single ended VI = – 0.5 dB to – 24 dB referred to Vref, 62 70 A/D input signal Differential Single-ended tested at 25 °C, See Note 8 62 70 Attenuation of third and higher Single ended VI = – 0.5 dB to – 24 dB referred to Vref, 57 65 harmonics of A/D input signal Differential Single-ended tested at 25 °C, See Note 8 57 65 Attenuation of second harmonic of Single ended VI = – 0 dB to – 24 dB referred to Vref, 70 D/A input signal Differential See Note 8 62 70 Attenuation of third and higher Single ended VI = – 0 dB to – 24 dB referred to Vref, 65 harmonics of D/A input signal Differential See Note 8 57 65 † All typical values are at TA = 25°C. NOTE 8: The test condition is a 1-kHz input signal with an 8-kHz conversion rate (0 dB relative to Vref). The load impedance for the DAC is 300 Ω. |
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