TLV2544IPW datasheet(17/39 Pages) TI

17 / 39 page

TLV2544, TLV2548

2.7 V TO 5.5 V, 12-BIT, 200 KSPS, 4/8 CHANNEL, LOW POWER,

SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTO POWER DOWN

SLAS198A –FEBRUARY 1999– REVISED AUGUST 1999

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

modes using the FIFO: modes 01, 10, 11 timing (continued)

tsample (3)

CSTART

SDI

INT

SDO

From Channel 0

(DSP)

Configure

Conversion

Read FIFO

Top of FIFO

Read FIFO

From Channel 0

Conversion

Repeat

First FIFO Read

Second FIFO Read

Repeat

‡

†

‡‡

‡

tsample(i) >= MIN (tsample)

tsample (2)

tsample (4)

tconvert

From Channel 3

Conversion

From Channel 3

tconvert

tsample (1)

† Command = Configure write for mode 10 or 11, FIFO threshold = 1/2, sweep seq = 0–1–2–3.

‡ Command = Read FIFO

Figure 13. TLV2544/TLV2548 Mode 10/11 DSP Serial Interface (Conversions triggered by CSTART)

CSTART

SDI

INT

SDO

From Channel 0

tconvert

Configure

Conversion

Read FIFO

Top of FIFO

Read FIFO

Conversion

Repeat

First FIFO Read

Second FIFO Read

Repeat

‡

†

‡‡

‡

tSample (i) > = MIN(tSample)

From Channel 3

From Channel 0

From Channel 3

tsample(1)

tsample(2)

tsample(3)

tsample(4)

tconvert

† Command = Configure write for mode 10 or 11, FIFO threshold = 1/2, sweep seq = 0–1–2–3.

‡ Command = Read FIFO

Figure 14. TLV2544/TLV2548 Mode 00/11

µp Serial Interface (Conversions triggered by CS)

TLV2544IPW Datasheet(PDF) 17 Page - Texas Instruments

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