TLV2544, TLV2548

2.7 V TO 5.5 V, 12-BIT, 200 KSPS, 4/8 CHANNEL, LOW POWER,

SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTO POWER DOWN

SLAS198A –FEBRUARY 1999– REVISED AUGUST 1999

33

POST OFFICE BOX 655303

PRINCIPLES OF OPERATION

1000000000

0111111111

0000000010

0000000001

0000000000

1111111110

0

0.0024

2.4564

2.4576

2.4588

1000000001

1111111101

1111111111

4.9056

4.9104

4.9152

2048

2047

2

1

0

4094

2049

4093

4095

VI – Analog Input Voltage – V

VZT =VZS + 1/2 LSB

VZS

See Notes A and B

0.0012

VFT = VFS – 1/2 LSB

VFS

VFS Nom

NOTES: A. This curve is based on the assumption that Vref+ and Vref– have been adjusted so that the voltage at the transition from digital 0 to

1 (VZT) is 0.0006 V, and the transition to full scale (VFT) is 4.9134 V, 1 LSB = 1.2 mV.

B. The full scale value (VFS) is the step whose nominal midstep value has the highest absolute value. The zero-scale value (VZS) is

the step whose nominal midstep value equals zero.

Figure 37. Ideal 12-Bit ADC Conversion Characteristics

GND

CS

XF

TMS320 DSP

TLV2544/

TLV2548

SDI

SDO

SCLK

INT

TXD

RXD

CLKR

BIO

10 k

Ω

vcc

AIN

VDD

FSR

FS

CLKX

FSX

Figure 38. Typical Interface to a TMS320 DSP