TLV5604CPWR datasheet(23/27 Pages) TI

23 / 27 page

TLV5604

2.7-V TO 5.5-V 10-BIT 3-

µS QUADRUPLE DIGITAL-TO-ANALOG CONVERTERS

WITH POWER DOWN

SLAS176A – DECEMBER 1997 – REVISED SEPTEMBER 1998

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

APPLICATION INFORMATION

; DAC D next

; DAC D codes should be taken from 16 bytes (8 samples) further on in the sine table

; – this gives an inverted cosine function

MOV

A,R7

; pointer in R7

ADD

A,#0FH

; add 15 – already done one INC

ANL

A,#03FH

; wrap back round to 0 if > 64

MOV

R7,A

; pointer back in R7

MOVC

A,@A+DPTR

; get DAC D msb from the table

ORL

A,#03H

; set control bits to DAC D address

B_LSB_TX:

JNB

TI,B_LSB_TX

; wait for DAC B lsb transmit to complete

SETB

; toggle FS

CLR

; clear for new transmit

MOV

SBUF,A

; and send out the msb of DAC D

INC

; increment the pointer in R7

MOV

A,R7

; to get the next byte from the table

MOVC

A,@A+DPTR

; which is the lsb of this sample, now in ACC

D_MSB_TX:

JNB

TI,D_MSB_TX

; wait for transmit to complete

CLR

; clear for new transmit

MOV

SBUF,A

; and send out the lsb of DAC D

; increment the rolling pointer to point to the next sample

; ready for the next interrupt

MOV

A,rolling_ptr

ADD

A,#02H

; add 2 to the rolling pointer

ANL

A,#03FH

; wrap back round to 0 if > 64

MOV

rolling_ptr,A

; store in memory again

D_LSB_TX:

JNB TI,D_LSB_TX

; wait for DAC D lsb transmit to complete

CLR

; clear for next transmit

SETB

; FS high

SETB

; CS high

POP

ACC

POP

PSW

RETI

;–––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––

; Stack needs definition

RSEG

STACK

10h

; 16 Byte Stack!

TLV5604CPWR Datasheet(PDF) 23 Page - Texas Instruments

TLV5604CPWR Datasheet(HTML) 23 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27

Datasheet Download

Link URL