TLV5614

2.7-V TO 5.5-V 12-BIT 3-

µS QUADRUPLE DIGITAL-TO-ANALOG CONVERTERS

WITH POWER DOWN

SLAS188 – SEPTEMBER 1998

5

POST OFFICE BOX 655303

electrical characteristics over recommended operating free-air temperature range, supply

voltages, and reference voltages (unless otherwise noted) (continued)

individual DAC output specifications

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VO

Voltage output range

RL = 10 kΩ

0

AVDD–0.4

V

Output load regulation accuracy

RL = 2 kΩ vs 10 kΩ

0.1

0.25

% of FS

voltage

reference inputs (REFINAB, REFINCD)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VI

Input voltage range

See Note 10

0

AVDD–1.5

V

RI

Input resistance

10

M

Ω

CI

Input capacitance

5

pF

Reference feed through

REFIN = 1 Vpp at 1 kHz + 1.024 V dc

(see Note 11)

–75

dB

Reference input bandwidth

REFIN = 0 2 V

+ 1 024 V dc large signal

Slow

0.5

MHz

Reference input bandwidth

REFIN = 0.2 Vpp + 1.024 V dc large signal

Fast

1

MHz

NOTES: 10. Reference input voltages greater than VDD/2 will cause output saturation for large DAC codes.

11. Reference feedthrough is measured at the DAC output with an input code = 000 hex and a Vref (REFINAB or REFINCD)

input = 1.024 Vdc + 1 Vpp at 1 kHz.

digital inputs (DIN, CS, LDAC, PD)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

IIH

High-level digital input current

VI = VDD

±1

µA

IIL

Low-level digital input current

VI = 0 V

±1

µA

CI

Input capacitance

3

pF

power supply

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

5-V supply,

No load Clock running

Slow

1.6

2.4

mA

IDD

Power supply current

No load, Clock running,

All inputs 0 V or VDD

Fast

3.8

5.6

mA

IDD

Power supply current

3-V supply,

No load Clock running

Slow

1.2

1.8

mA

No load, Clock running,

All inputs 0 V or DVDD

Fast

3.2

4.8

mA

Power down supply current (see Figure 12)

10

nA