TLV5614

2.7-V TO 5.5-V 12-BIT 3-

µS QUADRUPLE DIGITAL-TO-ANALOG CONVERTERS

WITH POWER DOWN

SLAS188 – SEPTEMBER 1998

15

POST OFFICE BOX 655303

APPLICATION INFORMATION

;–––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––

; Processor:

TMS320C203 runnning at 40 MHz

;

; Description:

;

; This program generates a differential in–phase (sine) on (OUTA–OUTB) and it’s

; quadrature (cosine) as a differential signal on (OUTC–OUTD).

;

; The DAC codes for the signal samples are stored as a table of 64 12–bit values,

; describing 2 periods of a sine function. A rolling pointer is used to address the

; table location in the first period of this waveform, from which the DAC A samples

; are read. The samples for the other 3 DACs are read at an offset to this rolling

; pointer:

;

DAC

Function

Offset from rolling pointer

;

A

sine

0

;

B

inverse sine

16

;

C

cosine

8

;

D

inverse cosine24

;

; The on–chip timer is used to generate interrupts at a fixed rate. The interrupt

; service routine first pulses LDAC low to update all DACs simultaneously

; with the values which were written to them in the previous interrupt. Then all

; 4 DAC values are fetched and written out through the synchronous serial interface

; Finally, the rolling pointer is incremented to address the next sample, ready for

; the next interrupt.

;

;

© 1998, Texas Instruments Inc.

;–––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––

;–––––––––––––––––––––––––––––– I/O and memory mapped regs –––––––––––––––––––––––––––––

.include ”regs.asm”

;–––––––jump vectors –––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––

.ps

0h

b

start

b

int1

b

int23

b

timer_isr;

––––––––––– variables –––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––

temp

.equ

0060h

r_ptr

.equ

0061h

iosr_stat

.equ

0062h

DACa_ptr

.equ

0063h

DACb_ptr

.equ

0064h

DACc_ptr

.equ

0065h

DACd_ptr

.equ

0066h

;–––––––––––constants––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––

; DAC control bits to be OR’ed onto data

; all fast mode

DACa_control .equ

01000h

DACb_control .equ

05000h

DACc_control .equ

09000h

DACd_control .equ

0d000h

;––––––––––– tables ––––––––––––––––––––––––––––––––

.ds

02000h

sinevals

.word

00800h

.word

0097Ch

.word

00AE9h

.word

00C3Ah

.word

00D61h

.word

00E53h

.word

00F07h

.word

00F76h

.word

00F9Ch

.word

00F76h

.word

00F07h

.word

00E53h