TMS320VC33 datasheet(32/57 Pages) TI

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TMS320VC33

DIGITAL SIGNAL PROCESSOR

SPRS087E − FEBRUARY 1999 − REVISED JANUARY 2004

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

memory read/write timing

The following tables define memory read/write timing parameters for STRB.

timing requirements for memory read/write† (see Figure 19, Figure 20, and Figure 21)

VC33-120

VC33-150

UNIT

MIN

MAX

MIN

MAX

UNIT

tsu(D-H1L)R

Setup time, Data before H1 low (read)

th(H1L-D)R

Hold time, Data after H1 low (read)

−1

tsu(RDY-H1H) Setup time, RDY before H1 high

th(H1H-RDY)

Hold time, RDY after H1 high

−1

td(A-RDY)

Delay time, Address valid to RDY

P−7‡

P−6‡

tv(A-D)

Valid time, Data valid after address

0 wait state, CL = 30 pF

tv(A-D)

Valid time, Data valid after address

PAGEx, or STRB valid

1 wait state

tc(H)+9

tc(H)+6

† These timings assume a similar loading of 30 pF on all pins.

‡ P = tc(H)/2 (when duty cycle equals 50%).

switching characteristics over recommended operating conditions for memory read/write†

(see Figure 19, Figure 20, and Figure 21)

PARAMETER

VC33-120

VC33-150

UNIT

PARAMETER

MIN

MAX

MIN

MAX

UNIT

td(H1L-SL)

Delay time, H1 low to STRB low

−1

td(H1L-SH)

Delay time, H1 low to STRB high

−1

td(H1H-RWL)W Delay time, H1 high to R/W low (write)

−1

td(H1L-A)

Delay time, H1 low to address valid

−1

td(H1H-RWH)W Delay time, H1 high to R/W high (write)

−1

td(H1H-A)W

Delay time, H1 high to address valid on back-to-back write cycles

(write)

−1

tv(H1L-D)W

Valid time, Data after H1 low (write)

th(H1H-D)W

Hold time, Data after H1 high (write)

† These timings assume a similar loading of 30 pF on all pins.

Output load characteristics for high-speed and low-speed (low-noise) output buffers are shown in Figure 19.

High-speed buffers are used on A0 − A23, PAGE0 − PAGE3, H1, H3, STRB, and R/W. All other outputs use the

low-speed, (low-noise) output buffer.

Low-Noise Buffer

High-Speed Buffer

Load Capacitance (pF)

CLmax = 30 pF

0.05 ns/pF

0.04 ns/pF

LOAD

0 pF

15 pF

30 pF

50 pF

2.0

2.6

3.2

4.0

2.8

3.4

4.4

5.25

HIGH

SPEED

LOW

NOISE

Figure 19. Output Load Characteristics, Buffer Only

TMS320VC33 Datasheet(PDF) 32 Page - Texas Instruments

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