TMS44400, TMS44400P, TMS46400, TMS46400P

1048576-WORD BY 4-BIT

DYNAMIC RANDOM-ACCESS MEMORIES

SMHS562C – MAY 1995 – REVISED NOVEMBER 1996

14

POST OFFICE BOX 1443

PARAMETER MEASUREMENT INFORMATION

DQ1 – DQ4

RAS

CAS

A0 – A9

W

OE

tRWC

tRAS

tRP

tCRP

tCAS

tT

tRCD

tASR

tRAH

tRAD

tAR

tASC

tCAH

tCP

tT

tCWL

tRWL

tWP

tRCS

tRWD

tAWD

tCWD

tCAC

tAA

tCLZ

tDS

tDH

tRAC

tOEH

tOED

tOEZ

tOEH

Don’t Care

Don’t Care

Don’t Care

Don’t Care

Don’t Care

Row

Column

See Note A

Data

In

Data

Out

NOTE A: Output can go from the high-impedance state to an invalid-data state prior to the specified access time.

Figure 7. Read-Write-Cycle Timing