October 2006

P2781/82/84

rev 1.6

General Purpose EMI Reduction IC

2 of 11

Notice: The information in this document is subject to change without notice.

Pin Configuration

Pin Description (P278xA)

Pin#

Pin Name

Type

Description

1

XIN/CLKIN

I

Connect to crystal or clock input. This pin has dual functions. It can be connected

either to an external crystal or an external reference clock.

2

XOUT

O

Crystal connection. If using an external reference, this pin must be left

unconnected.

3

FS1

I

Digital logic input used to select input frequency range

(see the Input Frequency Selection Table). This pin has an internal pull-up

resistor.

4

LF

I

External Loop Filter for the PLL. By changing the value of the CRC circuit, the

percentage spread can be adjusted accordingly. See the Loop Filter Selection

Table for detail value.

5

VSS

I

Ground Connection. Connect to system ground.

6

ModOUT

O

Spread Spectrum Clock Output.

7

FS0

I

Digital logic input used to select input frequency range

(see the Input Frequency Selection Table). This pin has an internal pull-up

resistor.

8

VDD

P

Connect to +3.3 V

Input Frequency Selection Table

Output Frequency Scaling (MHz)

FS1

FS0

Input (MHz)

P2781A

P2782A

P2784A

Modulation Rate (KHz)

0

0

3 to 9

3 to 9

6 to 18

12 to 36

Fin / 128

0

1

10 to 19

10 to 19

20 to 38

40 to 76

Fin / 256

1

0

20 to 38

20 to 38

40 to 76

80 to 152

Fin / 512

1

1

39 to 78

39 to 78

78 to 156

156 to 312

Fin / 1024

Standard pin Configuration offered in both

8 pin SOIC and TSSOP Packages

FS1

LF

FS0

VDD

VSS

1

2

3

4

5

6

7

8

P278xA

XIN / CLKIN

ModOUT

XOUT