TPS2202DB datasheet(6/21 Pages) TI

6 / 21 page

TPS2202, TPS2202Y

DUAL-SLOT PC CARD POWER-INTERFACE SWITCHES

FOR SERIAL PCMCIA CONTROLLERS

SLVS103A – DECEMBER 1994 – REVISED AUGUST 1995

6–6

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

electrical characteristics, TA = 25°C, VDD = 5 V (unless otherwise noted) (continued)

logic section

PARAMETER

TEST CONDITIONS

TPS2202

UNIT

PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

Logic input current

µA

Logic input high level

2.7

Logic input low level

0.8

Logic output high level

IO =1mA

VDD – 0.4

Logic output low level

IO = 1 mA

0.4

dc characteristics

PARAMETER

TEST CONDITIONS

TPS2202Y

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Leakage current

Ipp High-impedance state

µA

Leakage current

ICC High-impedance state

µA

Input current

IDD

VO(AVCC) = VO(BVCC) = 5 V,

VO(AVPP) = VO(BVPP) = 12 V

µA

Power-ready threshold, PWR_GOOD

11.05

Power-ready hysteresis, PWR_GOOD (12-V mode)

switching characteristics†

PARAMETER

TEST CONDITIONS

TPS2202Y

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Output rise time

VO(xVCC)

1.2

Output rise time

VO(xVPP)

Output fall time

VO(xVCC)

Output fall time

VO(xVPP)

‡

LATCH

↑ to VO(

)

ton

5.8

‡

LATCH

↑ to VO(xVPP)

toff

t d

Propagation delay (see Figure 1‡)

LATCH

↑ to xVCC

ton

5.8

tpd

Propagation delay (see Figure 1‡)

LATCH

↑ to xVCC

toff

LATCH

↑ to xVCC

ton

LATCH

↑ to xVCC

toff

† Refer to Parameter Measurement Information

‡ Propagation delays are with CL = 100 µF.

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