TPS2832, TPS2833

FAST SYNCHRONOUS-BUCK MOSFET DRIVER

WITH DEADTIME CONTROL

SLVS195B – JANUARY 1999 – REVISED SEPTEMBER 1999

6

POST OFFICE BOX 655303

switching characteristics over recommended operating virtual junction temperature range,

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

HIGHDR

t

t

VBOOT = 4.5 V,

VBOOTLO = 0 V

60

HIGHDR output

(see Note 3)

VBOOT = 6.5 V,

VBOOTLO = 0 V

50

ns

Rise time

(see Note 3)

VBOOT = 12 V,

VBOOTLO = 0 V

50

Rise time

LOWDR

t

t

VCC = 4.5 V

40

LOWDR output

(see Note 3)

VCC = 6.5 V

30

ns

(see Note 3)

VCC = 12 V

30

HIGHDR

t

t

VBOOT = 4.5 V,

VBOOTLO = 0 V

60

HIGHDR output

(see Note 3)

VBOOT = 6.5 V,

VBOOTLO = 0 V

50

ns

Fall time

(see Note 3)

VBOOT = 12 V,

VBOOTLO = 0 V

50

Fall time

LOWDR

t

t

VCC = 4.5 V

40

LOWDR output

(see Note 3)

VCC = 6.5 V

30

ns

(see Note 3)

VCC = 12 V

30

HIGHDR going low

VBOOT = 4.5 V,

VBOOTLO = 0 V

130

HIGHDR going low

(excluding deadtime)

VBOOT = 6.5 V,

VBOOTLO = 0 V

100

ns

Propagation delay time

(see Note 3)

VBOOT = 12 V,

VBOOTLO = 0 V

75

Propagation delay time

LOWDR going high

VBOOT = 4.5 V,

VBOOTLO = 0 V

80

LOWDR going high

(excluding deadtime)

VBOOT = 6.5 V,

VBOOTLO = 0 V

70

ns

(see Note 3)

VBOOT = 12 V,

VBOOTLO = 0 V

60

LOWDR going low

VCC = 4.5 V

80

Propagation delay time

LOWDR going low

(excluding deadtime)

VCC = 6.5 V

70

ns

(see Note 3)

VCC = 12 V

60

DT to LOWDR and

VCC = 4.5 V

40

170

Driver nonoverlap time

DT to LOWDR and

LOWDR to HIGHDR

(N

)

VCC = 6.5 V

25

135

ns

(see Note 3)

VCC = 12 V

15

85

NOTE 3:

Ensured by design, not production tested.