TUSB2040A

4-PORT HUB FOR THE UNIVERSAL SERIAL BUS

WITH OPTIONAL SERIAL EEPROM INTERFACE

SLLS288B – FEBRUARY 1998 – REVISED MARCH 1998

10

POST OFFICE BOX 655303

APPLICATION INFORMATION

Figure 8. Crystal Tuning Circuit

Y1

XTAL1

2.2 k

Ω

R70

C66

47 pF

C68

1000 pF

XTAL2

L1

5.6

µH

C67

12 pF

NOTE B: This application shows a third harmonic 48-Mhz crystal, P/N HC-18/U 48-MHz, manufactured by US Crystal, Inc. Since the first

harmonic of most crystals is not 48-MHz, a tuning circuit such as this must be used to tune the crystal to the required 48-MHz clock

signal. When tuning the crystal (Y1) for different board implementations, the capacitor (C67) and the resistor (R70) are subject to

change and the other components should remain the same.

programming the EEPROM

An SGS Thompson M93C46 EEPROM or equivalent is used for storing the programmable VID and PID. When

the EEPROM interface is enabled (EXTMEM = 1), the SCL and SDA are internally pulled down (100

µA) inside

the TUSB2040A. However, in low-power suspend mode, the BUSPWR/SCL pin must be externally pulled down

because the internal pulldowns are disabled. The internal pulldowns are also disabled when the EEPROM

interface is disabled (EXTMEM = 0).

The EEPROM is programmed with the three 16-bit locations as shown in Table 1. Connecting pin 6 of the

EEPROM high (ORG = 1) organizes the EEPROM memory into 64

×16 bit words.

Table 1. EEPROM Memory Map

ADDRESS

D15

D14

D13

D12–D8

D7–D0

00000

0

GANGED

BUSPWR

00000

00000000

00001

VID High-byte

VID Low-byte

00010

PID High-byte

PID Low-byte

XXXXXXXX

The D and Q signals of the EEPROM must be tied together using a 1 k

Ω resistor with the common I/O operations

forming a single-wire bus. After system power-on reset, the TUSB2040A performs a one-time access read

operation from the EEPROM if the EXTMEM pin is pulled high and the chip select of the EEPROM is connected

to the system power-on reset. Initially, the SDA pin will be driven by the TUSB2040A to send a start bit (1) which

is followed by the read instruction (10) and the starting-word address (00000). Once the read instruction is

received, the instruction and address are decoded by the EEPROM, which then sends the data to the output

shift register. At this point, the hub stops driving the SDA pin and the EEPROM starts driving. A dummy (0) bit

is then output and the first three 16-bit words in the EEPROM are output with the most significant bit (MSB) first.

The output data changes are triggered by the rising edge of the clock provided by the TUSB2040A on the SCL

pin. The

SGS-Thompson M936C46 EEPROM is recommended because it advances to the next memory

location by automatically incrementing the address internally. Any EEPROM used must have the automatic

internal address advance function. After reading the three words of data from the EEPROM, the TUSB2040A

puts the EEPROM interface into a high-impedance condition (pulled down internally) to allow other logic to share

the EEPROM. The EEPROM read operation is summarized in Figure 9. For more details on EEPROM

operation, refer to

SGS-Thompson Microelectronics M93C46 Serial Microwire Bus EEPROM data sheet.