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TPS65573DSST Datasheet(PDF) 7 Page - Texas Instruments |
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TPS65573DSST Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 13 page ![]() Charging Control TPS65573 www.ti.com................................................................................................................................................................................................... SLVS868 – MARCH 2009 Figure 5 shows a timing diagram at beginning/ending. The TPS65573 provides three comparators to control the charging operation. U1 is the VFULL comparator to detect the charge completion, U2 is the VZERO comparator to detect the turn-on time of the power SW, and U3 is the IPEAK comparator to detect the turn-off time of the power SW. Figure 5. Beginning/Ending Timing While the power SW is ON, the IPEAK comparator (U3) monitors current flow through the power SW from SW to GND. When the current at SW (ISW) exceeds the threshold defined by the voltage of the I_PEAK pin (IPEAK), the power SW turns OFF. After the power SW turns OFF, the spike voltage occurs immediately because of leakage inductance at the primary side. It might cause the power SW to break. To avoid this, the leakage inductance should be reduced as much as possible. When the power SW is OFF, the magnetic energy in the transformer starts discharging from the primary side to the secondary side. During this discharge, the VZERO comparator (U2) monitors the kickback voltage at the primary side to compare it with the VBAT voltage. The kickback voltage increases rapidly until the diode placed at secondary side turns ON. The diode turns ON when the voltage of secondary side of the transformer reaches more than the voltage of the output capacitor. After the diode turns ON, the kickback voltage is almost stable until the magnetic energy at the primary side discharges completely. After the discharge stops, the small amount of energy left in the transformer is released via parasitic paths, and the kickback voltage reaches almost zero voltage. During this period, U2 makes the power SW turn ON when (VSW – VBAT) drops from VZERO. The VFULL comparator (U1) also monitors the kickback voltage. When VSW – VBAT exceeds VFULL, the TPS65573 stops the charging operation. After detection, XFULL goes to low level to indicate charge completion. After charge completion, the TPS65573 immediately goes into disable mode with the internal ENA automatically turning to a low level. The purpose is to save the consumption power. Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Link(s): TPS65573 |
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