SE97 datasheet(38/54 Pages) NXP

38 / 54 page

SE97_5

Product data sheet

Rev. 05 — 6 August 2009

38 of 54

NXP Semiconductors

SE97

DDR memory module temp sensor with integrated SPD, 3.3 V

[1]

High-voltage input voltage applied to pin A0 during RWP and CRWP operations. The JEDEC speciﬁcation is 7 V (min.) and 10 V (max.),

but since the SE97 EEPROM write works only down to 3.0 V, the condition of VI(ov) >4.8V+VDD or > 4.8 V + 3.0 V was applied and the

minimum voltage changed to 7.8 V. If VDD is 3.6 V then the minimum voltage is 8.4 V.

Table 29.

DC characteristics

VDD = 1.7 V to 3.6 V; Tamb = −40 °C to +125 °C; unless otherwise speciﬁed. These speciﬁcations are guaranteed by design.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

IDD(AV)

average supply current

SMBus inactive

250

400

µA

Isd(VDD)

supply voltage shutdown mode

current

SMBus inactive

0.1

5.0

µA

VIH

HIGH-level input voltage

SCL, SDA;

VDD = 3.0 V to 3.6 V

0.7

× VDD -VDD +1

VIL

LOW-level input voltage

SCL, SDA;

VDD = 3.0 V to 3.6 V

0.3

× VDD V

VOL1

LOW-level output voltage 1

VDD = 3.0 V; IOL = 3 mA

0.4

VOL2

LOW-level output voltage 2

VDD = 1.7 V; IOL = 1.5 mA

0.5

VI(ov)

overvoltage input voltage

pin A0; VI(ov) − VDD > 4.8 V

[1] 7.8

VPOR

power-on reset voltage

power supply rising

1.7

power supply falling

SE97PW, SE97TK

0.1

SE97TL, SE97TP

0.6

IOL(sink)EVENT LOW-level output sink current on

pin EVENT

VOL1 = 0.4 V

SE97PW, SE97TK

SE97TL, SE97TP

IOL(sink)(SDA)

LOW-level output sink current on

pin SDA

VOL2 = 0.5 V

ILOH

HIGH-level output leakage current

EVENT; VOH =VDD

−1.0

+1.0

µA

ILIH

HIGH-level input leakage current

SDA, SCL; VI =VDD

−1.0

+1.0

µA

ILIL

LOW-level input leakage current

SDA, SCL; VI =VSS

−1.0

+1.0

µA

A0, A1, A2; VI =VSS

−1.0

+1.0

µA

Ci(SCL/SDA)

SCL and SDA input capacitance

leakage current

on A0, A1, A2

µA

Ipd

pull-down current

internal; A0, A1, A2 pins;

VI = 0.3VDD to VDD

4.0

µA

ZIL

LOW-level input impedance

pins A0, A1, A2; VI < 0.3VDD

Ω

ZIH

HIGH-level input impedance

pins A0, A1, A2

800

Ω

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