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TDF8599ATH Datasheet(PDF) 24 Page - NXP Semiconductors

Part # TDF8599ATH
Description  I2C-bus controlled dual channel 135 W/4 W, single channel 250 W/2 W class-D power amplifier with load diagnostics
PDF  54 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

TDF8599ATH Datasheet(HTML) 24 Page - NXP Semiconductors

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TDF8599A_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 30 June 2009
24 of 54
NXP Semiconductors
TDF8599A
I2C-bus controlled dual channel class-D power amplifier
In non-I2C mode or when IB3[D7] = 0, the information on the MOD and ADS pins is
latched when one of the TDF8599A’s outputs starts switching.
(1) When SCL is HIGH, SDA changes to form the start or
stop condition.
(1) SDA is allowed to change.
(2) All data bits must be valid on the positive edges of SCL.
Fig 22. I2C-bus start and stop conditions
Fig 23. Data bits sent from Master microprocessor
(M
µp)
STOP
START
001aai792
SCL
SDA
M
µp
SLAVE
(1)
SCL
SDA
001aai793
(2)
(1)
M
µp
SLAVE
(1) To stop the transfer after the last acknowledge a stop condition must be generated.
Fig 24. I2C-bus write
001aai794
LSB + 1
LSB + 1
LSB
MSB
− 1
MSB
MSB
− 1
MSB
ACK
ACK
ACK(1)
ACK
STOP
WRITE DATA
WRITE
START
ADDRESS
12
7
8
9
7
8
9
12
SCL
SDA
M
µp
SLAVE
(1) To stop the transfer, the last byte must not be acknowledged (SDA is HIGH) and a stop condition must be generated.
Fig 25. I2C-bus read
001aai795
LSB + 1
LSB + 1
LSB
MSB
− 1
MSB
MSB
− 1
MSB
ACK
ACK(1)
ACKNOWLEDGE
STOP
READ DATA
READ
START
ADDRESS
12
7
8
9
7
8
9
12
SCL
SDA
M
µp
SLAVE



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