TDF8599ATH datasheet(27/54 Pages) NXP

27 / 54 page

TDF8599A_2

Product data sheet

Rev. 02 — 30 June 2009

27 of 54

NXP Semiconductors

TDF8599A

I2C-bus controlled dual channel class-D power ampliﬁer

10. Limiting values

[1]

Floating condition assumed for outputs.

[2]

Current limiting concept.

[3]

Human Body Model (HBM).

[4]

Charged-Device Model (CDM).

[5]

The output pins are deﬁned as the output pins of the ﬁlter connected between the TDF8599A output pins

and the load.

Table 17.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

Parameter

Conditions

Min

Max

Unit

supply voltage

Operating mode

off state

[1]

−1

+50

load dump; duration

50 ms; tr > 2.5 ms

-50

IORM

repetitive peak output

current

maximum output current

limiting

[2] 8-

IOM

peak output current

maximum; non-repetitive

stereo mode

parallel mode

input voltage

pins SCL, SDA, ADS,

MOD, SSM, OSCIO, EN

and SEL_MUTE

5.5

pins IN1N, IN1P, IN2N

and IN2P

010

output voltage

pins DIAG and CLIP

RESR

equivalent series resistance

as seen between pins VP

and PGNDn

350

Ω

junction temperature

150

°C

Tstg

storage temperature

−55

+150

°C

Tamb

ambient temperature

−40

+85

°C

VESD

electrostatic discharge

voltage

HBM

[3]

C = 100 pF;

Rs = 1.5 kΩ

2000

CDM

[4]

non-corner pins

500

corner pins

750

V(prot)

protection voltage

AC and DC short circuit

voltage of output pins

across load and to

supply and ground

[5] 0VP

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