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TDF8599BTH Datasheet(PDF) 30 Page - NXP Semiconductors

Part # TDF8599BTH
Description  I2C-bus controlled dual channel 43 W/4 W, single channel 85 W/1 W class-D power amplifier with load diagnostics
PDF  54 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

TDF8599BTH Datasheet(HTML) 30 Page - NXP Semiconductors

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TDF8599B_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 29 July 2009
30 of 54
NXP Semiconductors
TDF8599B
I2C-bus controlled dual channel class-D power amplifier
[1]
Required resistor accuracy for pins ADS and MOD is 1 %; see Section 9 on page 23.
[2]
Maximum leakage current from DCP pin to ground = 3
µA.
[3]
The output offset values can be either positive or negative. The Vth(offset) limit values (excluding Typ) are the valid absolute values.
[4]
DC output offset voltage is applied to the output gradually during the transition between Mute mode and Operating mode.
[5]
I2C-bus mode only.
[6]
The transition time between Mute mode and Operating mode is determined by the time constant on the SEL_MUTE pin.
[7]
The DC load valid bit DB1[D6] must be used; Section 8.6.2.1 on page 18. The DC load enable bit IB2[D2] must be reset after each load
detection cycle to prevent amplifier hang-up incidents.
Start-up/shut-down/mute timing
twake
wake-up time
on pin EN before first I2C-bus
transmission is recognized
[5] -
-
500
µs
tdet(DCload)
DC load detection time
CON = 470 nF
[5] -
380
-
ms
td(stb-mute)
delay time from standby to
mute
measured from amplifier enabling
to start of unmute (no DC load
detection); CSVRR =47 µF
CON = 470 nF
-
140
-
ms
td(mute-fgain)
mute to full gain delay time
CON = 470 nF
[6] -15
-
ms
td
delay time
shutdown delay time from EN pin
LOW to SVRR LOW; voltage on
pin SVRR < 0.1 V; CSVRR =47 µF
200
350
550
ms
shutdown delay time from EN pin
LOW to SVRR LOW; voltage on
pin SVRR < 0.1 V; CSVRR =47 µF;
VP =35V
300
400
700
ms
shutdown hold delay time from pin
EN LOW to ACGND LOW; voltage
on pin ACGND < 0.1 V; Master
mode
-
370
-
ms
hold delay in Master mode to allow
slaved devices to shutdown
fosc = 320 kHz
-50
-
ms
Speaker load impedance
RL
load resistance
at supply voltage equal to or below
24 V
stereo mode
1.6
4
-
Ω
parallel mode
0.8
-
-
Ω
Table 19.
Static characteristics …continued
VP =VDDA = 14.4 V; fosc = 320 kHz; −40 °C < Tamb < +85 °C; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit



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