LTC3601IMSE datasheet(17/24 Pages) LINER

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LTC3601

3601f

From the previous section, IGATECHG is ~4mA when f =

4MHz, and the spec table lists the typical IQ to be 1mA.

Therefore, the total power dissipation due to resistive

losses and LDO losses is:

PD = IOUT2 • RSW + VIN • (IGATECHG + IQ)

PD = (1.5)2 • (0.105) + 12V • 5mA = 296mW

The QFN 3mm ×3mmpackagejunction-to-ambientthermal

resistance, θJA, is around 45°C/W. Therefore, the junction

temperature of the regulator operating in a 70°C ambient

temperature is approximately:

TJ = 0.296 • 45 + 70 = 83.3°C

which is well below the speciﬁed maximum junction

temperature of 125°C.

Board Layout Considerations

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of

the LTC3601.

1. Do the capacitors CIN connect to VIN and PGND as close

to the pins as possible? These capacitors provide the AC

current to the internal power MOSFETs and drivers. The

(–) plate of CIN should be closely connected to PGND

and the (–) plate of COUT.

2. The output capacitor, COUT, and inductor L1 should

be closely connected to minimize loss. The (–) plate

of COUT should be closely connected to PGND and the

(–) plate of CIN.

3. The resistive divider, R1 and R2, must be connected

between the (+) plate of COUT and a ground line termi-

nated near SGND. The feedback signal, VFB, should be

routed away from noisy components and traces such as

the SW line, and its trace length should be minimized.

In addition, RT and the loop compensation components

should be terminated to SGND.

4. Keep sensitive components away from the SW pin. The

RRT resistor, the feedback resistors, the compensation

components, and the INTVCCbypasscapacitorshouldall

be routed away from the SW trace and the inductor.

5. A ground plane is preferred, but if not available the

signal and power grounds should be segregated with

both connecting to a common, low noise reference

point. The point at which the ground terminals of the

VIN and VOUT bypass capacitors are connected makes a

good, low noise reference point. The connection to the

PGND pin should be made with a minimal resistance

trace from the reference point.

6. Flood all unused areas on all layers with copper in order

to reduce the temperature rise of power components.

These copper areas should be connected to the exposed

backside connection of the IC.

APPLICATIONS INFORMATION

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