10

Ω

Ω, Quad, SPST, +3V Logic-Compatible

Analog Switches

______________________________________________________________________________________

11

CAPACITANCE

METER

C

V+

V+

f = 1MHz

COM_

NC_ OR

NO_

GND

V-

V-

C

IN_

IN_

MAX312L

MAX313L

MAX314L

Figure 6. Channel Off-Capacitance Test Circuit

CAPACITANCE

METER

C

V+

V+

f = 1MHz

COM_

NC_ OR

NO_

GND

V-

V-

C

IN_

IN_

MAX312L

MAX313L

MAX314L

Figure 7. Channel On-Capacitance Test Circuit

Test Circuits/Timing Diagrams (continued)

Ordering Information (continued)

PART

TEMP RANGE

PIN-PACKAGE

MAX313LCUE

0°C to +70°C

16 TSSOP

MAX313LCSE

0°C to +70°C

16 Narrow SO

MAX313LCPE

0°C to +70°C

16 Plastic DIP

MAX313LEUE

-40°C to +85°C

16 TSSOP

MAX313LESE

-40°C to +85°C

16 Narrow SO

MAX313LEPE

-40°C to +85°C

16 Plastic DIP

MAX313LETP

-40°C to +85°C

20 Thin QFN-EP*

MAX314LCUE

0°C to +70°C

16 TSSOP

MAX314LCSE

0°C to +70°C

16 Narrow SO

MAX314LCPE

0°C to +70°C

16 Plastic DIP

MAX314LEUE

-40°C to +85°C

16 TSSOP

MAX314LESE

-40°C to +85°C

16 Narrow SO

MAX314LEPE

-40°C to +85°C

16 Plastic DIP

MAX314LETP

-40°C to +85°C

20 Thin QFN-EP*

*

EP = Exposed pad.