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CS2000-OTP Datasheet(PDF) 16 Page - Cirrus Logic

Part # CS2000-OTP
Description  Fractional-N Clock Synthesizer & Clock Multiplier
PDF  30 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS2000-OTP Datasheet(HTML) 16 Page - Cirrus Logic

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CS2000-OTP
16
DS758F1
5.4.5.1
Manual Fractional-N Source Selection for the Frequency Synthesizer
Manual selection of the fractional-N source for the frequency synthesizer can be done in one of two
ways. The FracNSrc modal parameter can be set to the desired setting for each available configu-
ration mode and then the Fractional N source is selected by the M1 and M0 pins. In order for this
manual selection to work, the LockClk[1:0] modal parameter (even if unused) must be set to the
same value as the modal ratio (Ratio 0 for Mode 0, Ratio 1 for Mode 1, etc.), see Section 5.4.5.2
on page 16. Alternatively, the M2 pin in conjunction with the M2Config[2:0] global parameter can
be set to control the fractional N source directly and thus override the FracNSrc modal parameter
(see Section 5.7.2.4 on page 20 for details).
5.4.5.2
Automatic Fractional-N Source Selection for the Frequency Synthesizer
Automatic source selection allows for the selection of the frequency synthesizer’s fractional-N value
to be made dependent on the presence of the CLK_IN signal. When CLK_IN is present the device
will use the dynamic ratio generated from the Digital PLL and CLK_IN for Hybrid PLL Mode. When
CLK_IN is not present, the device will use RefClk and the static ratio for Frequency Synthesizer
Mode. After losing CLK_IN, the CS2000-OTP will wait for 223 SysClk cycles before switching to Sy-
sClk and re-acquiring lock, during which time the PLL is unlocked
The modal ratio location (see Table 1 on page 11) should contain the desired CLK_OUT to RefClk
ratio to be used when CLK_IN is not present. The User Defined Ratio pointed to by LockClk[1:0]
should contain the desired CLK_OUT to CLK_IN ratio to be used when CLK_IN is present. Auto-
matic source selection is enabled when the LockClk[1:0] modal parameter is set to a different User
Defined Ratio from the modal ratio location.
When automatic source selection is enabled, the FracNSrc modal parameter (used for manual
clock selection) will be ignored.
The automatic source selection feature can be disabled by setting the LockClk[1:0] modal param-
eter to the modal ratio location. The FracNSrc modal parameter must then be used to select the
desired clock used for the PLL’s frequency reference. The automatic source selection feature can
also be disabled by using the M2 pin in conjunction with the M2Config[2:0] global parameter.
Referenced Control
Parameter Definition
M[1:0] pins ............................ “M1 and M0 Mode Pin Functionality” on page 19
LockClk[1:0] .......................... “Lock Clock Ratio (LockClk[1:0])” section on page 23
FracNSrc............................... “Fractional-N Source for Frequency Synthesizer (FracNSrc)” section on page 23
M2Config[2:0] ....................... “M2 Pin Configuration (M2Config[2:0])” on page 25
Referenced Control
Parameter Definition
M[1:0] pins ............................ “M1 and M0 Mode Pin Functionality” on page 19
LockClk[1:0] .......................... “Lock Clock Ratio (LockClk[1:0])” section on page 23
FracNSrc............................... “Fractional-N Source for Frequency Synthesizer (FracNSrc)” section on page 23
M2Config[2:0] ....................... “M2 Pin Configuration (M2Config[2:0])” on page 25



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