DS803F1

13

CS4353

4. APPLICATIONS

4.1

Line Outputs

4.1.1

Ground-centered Outputs

An on-chip charge pump creates both positive and negative high-voltage supplies, which allows the full-

scale output swing to be centered around ground. This eliminates the need for large DC-blocking capac-

itors which create audible pops at power-on, allows the CS4353 to deliver a larger full-scale output at low-

er supply voltages, and provides improved bandwidth frequency response.

4.1.2

Full-scale Output Amplitude Control

The full-scale output voltage amplitude is selected via the 1_2VRMS pin. When the pin is connected to

between the AOUTx pin and the load will lower the voltage delivered to the load. See the DAC Analog

Characteristics table for the complete specifications of the full-scale output voltage.

4.1.3

Pseudo-differential Outputs

The CS4353 implements a pseudo-differential output stage. The AOUT_REF input is intended to be used

as a pseudo-differential reference signal. This feature provides common mode noise rejection with single-

ended signals. Figure 4 shows a basic diagram outlining the internal implementation of the pseudo-differ-

ential output stage, including a recommended stereo pseudo-differential output topology. If pseudo-differ-

ential output functionality is not required, simply connect the AOUT_REF pin to ground next to the

CS4353. If a split-ground design is used, the AOUT_REF pin should be connected to AGND. See the Ab-

solute Maximum Ratings table for the maximum allowable voltage on the AOUT_REF pin. Applying a DC

voltage on the AOUT_REF pin will cause a DC offset on the DAC output.

Internal Left

DAC Signal

AOUTA

AOUT_REF

//

//

Left Output

GND

(pseudo-differential traces)

AOUTB

//

Right Output

(pseudo-differential traces)

Internal Right

DAC Signal

Psuedo-differential output improves common

mode rejection, reducing external system noise

Figure 4. Stereo Pseudo-differential Output