ADP3623/ADP3624/ADP3625/ADP3633/ADP3634/ADP3635

Rev. A | Page 14 of 16

THERMAL CONSIDERATIONS

When designing a power MOSFET gate drive, the maximum

power dissipation in the driver must be considered to avoid

exceeding maximum junction temperature.

Data on package thermal resistance is provided in Table 2 to

help the designer in this task.

There are several equally important aspects that must be

considered.

•

Gate charge of the power MOSFET being driven

•

Bias voltage value used to power the driver

•

Maximum switching frequency of operation

•

Value of external gate resistance

•

Maximum ambient (and PCB) temperature

•

Type of package

All of these factors influence and limit the maximum allowable

power dissipated in the driver.

The gate of a power MOSFET has a nonlinear capacitance

characteristic. For this reason, although the input capacitance

useful to calculate power losses.

The total gate charge necessary to turn on a power MOSFET

This parameter varies from a few nanocoulombs (nC) to several

or 4.5 V).

The power necessary to charge and then discharge the gate of a

power MOSFET can be calculated as:

where:

lied by the number of drivers (in this case, 1 or 2) being used

in each package, and it represents the total power dissipated in

charging and discharging the gates of the power MOSFETs.

Not all of this power is dissipated in the gate driver because part

larger the external gate resistor is, the smaller the amount of

power that is dissipated in the gate driver.

In modern switching power applications, the value of the gate

resistor is kept at a minimum to increase switching speed and

minimize switching losses.

In all practical applications where the external resistor is in the

order of a few ohms, the contribution of the external resistor

can be neglected, and the extra loss is assumed in the driver,

providing a good guard band to the power loss calculations.

In addition to the gate charge losses, there are also dc bias

losses, due to the bias current of the driver. This current is

present regardless of the switching.

where n is the number of gates driven.

When the total power loss is calculated, the temperature

increase can be calculated as

Design Example

For example, consider driving two IRFS4310Z MOSFETs with a

ADP3624 in the SOIC_N_EP package.

The maximum PCB temperature considered for this design is 85°C.

From the MOSFET data sheet, the SOIC_N_EP thermal

resistance is 59°C/W.

This estimated junction temperature does not factor in the

power dissipated in the external gate resistor and, therefore,

provides a certain guard band.

If a lower junction temperature is required by the design,

the MINI_SO_EP package can be used, which provides a

thermal resistance of 43°C/W, so that the maximum junction

temperature is

Other options to reduce power dissipation in the driver include

quency, and choosing a power MOSFET with smaller gate charge.