XRT91L31 datasheet(39/41 Pages) EXAR

39 / 41 page

XRT91L31

REV. 1.0.2

STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER

LVPECL AND LVTTL LOGIC SIGNAL DC ELECTRICAL CHARACTERISTICS

NOTE: All input control pins are LVCMOS and LVTTL compatible. All output control pins are LVCMOS compatible and

LVTTL compliant to

±1 mA maximum current drive.

ELECTRICAL CHARACTERISTICS

Test Conditions: VDD = 3.3V + 5% unless otherwise specified

SYMBOL

TYPE

PARAMETER

MIN

TYP

MAX

UNITS

CONDITIONS

VOH

LVPECL

Output High Voltage

VDDLVPECL -

0.9

VOL

LVPECL

Output Low Voltage

0.7

VOCOMM

LVPECL

Output Common Mode Voltage

1.1

VDDLVPECL -

1.3

VODIFF

LVPECL

Peak-to-peak Output Differen-

tial Voltage (see

Figure 28)

600

1300

187

pull

down and 100

line-to-line ter-

mination. (see

Figure 17)

VIH

LVPECL

Input High Voltage

VDDLVPECL -

0.9

VDDLVPECL -

0.3

For

Single-Ended

VIL

LVPECL

Input Low Voltage

VDDLVPECL -

1.72

For

Single-Ended

VIDIFF

LVPECL

Peak-to-peak Input PECL Dif-

ferential Voltage (see

Figure 28)

400

1600

100

line-to-

line termina-

tion. (see

Figure 3)

VICOMM

LVPECL

Input PECL Common Mode

Voltage

1.5 - VIDIFF/2

1.7

VDDLVPECL -

1.0 -VIDIFF/2

Internal com-

mon mode

biasing.

VOH

LVTTL/

LVCMOS

Output High Voltage

2.4

VDD3.3

IOH = -1.0mA

VOL

LVTTL/

LVCMOS

Output Low Voltage

0.4

IOL = 1.0mA

VIH

LVTTL/

LVCMOS

Input High Voltage

2.0

VDD3.3

VIL

LVTTL/

LVCMOS

Input Low Voltage

0.8

IIH

LVTTL/

LVCMOS

Input High Current

500

μA

2.0V<VIN<3.3V

VIN=2.4V typical

IIL

LVTTL/

LVCMOS

Input Low Current

-500

μA

-0.5V<VIN<0.8V

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