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MCP3909 Datasheet(PDF) 17 Page - Microchip Technology |
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MCP3909 Datasheet(HTML) 17 Page - Microchip Technology |
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17 / 44 page ![]() © 2009 Microchip Technology Inc. DS22025B-page 17 MCP3909 3.14 Serial Data Output or Negative Power Output Logic Pin (NEG) This dual function pin can act as either the serial data output for SPI communication or NEG. NEG detects the phase difference between the two channels and will go to a logic ‘1’ state when the phase difference is greater than 90° (i.e., when the measured real power is negative). The output state is synchronous with the rising-edge of HFOUT and maintains the logic ‘1’ until the real power becomes positive again and HFOUT shows a pulse. 3.15 Ground Connection (DGND) DGND is the ground connection to internal digital circuitry (SINC filters, multiplier, HPF, LPF, digital-to-frequency converter and oscillator). To ensure accuracy and noise cancellation, DGND must be connected to the same ground as AGND, preferably with a star connection. If a digital ground plane is available, it is recommended that this device be tied to this plane of the Printed Circuit Board (PCB). This plane should also reference all other digital circuitry in the system. 3.16 High-Frequency Output (HFOUT) HFOUT is the high-frequency output of the device and supplies the instantaneous real-power information. The output is a periodic pulse output, with its period propor- tional to the measured real power, and to the HFC constant defined by F0, F1 and F2 pin logic states. This output is the preferred output for calibration due to faster output frequencies, giving smaller calibration times. Since this output gives instantaneous real power, the 2 ω ripple on the output should be noted. However, the average period will show minimal drift. 3.17 Frequency Output (FOUT0, FOUT1) FOUT0 and FOUT1 are the frequency outputs of the device that supply the average real-power information. The outputs are periodic pulse outputs, with its period proportional to the measured real power, and to the FC constant, defined by F0 and F1 pin logic states. These pins include high-output drive capability for direct use of electromechanical counters and 2-phase stepper motors. Since this output supplies average real power, any 2 ω ripple on the output pulse period is minimal. |
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