ACT8740 datasheet(5/40 Pages) ACTIVE-SEMI

5 / 40 page

ACT8740

Rev PrB, 25-Feb-08

Innovative Products. Active Solutions.

- 5 -

www.active-semi.com

ActivePMU

TM is a trademark of Active-Semi.

2CTM is a trademark of Philips Electronics.

PIN DESCRIPTIONS

NAME

DESCRIPTION

VIN

Power Input for the Battery Charger. The Battery Charger, REG1 and REG3 are automatically

enabled whenever a valid voltage is present on VIN. Bypass to GA with a high quality ceramic

capacitor placed as close as possible to the IC.

SCL

Clock Input for I2C Serial Interface. Data is read on the rising edge of the clock.

SDA

Data Input for I2C Serial Interface. Data is read on the rising edge of the clock.

nIRQ

Open-Drain Push-Button Status Output. nIRQ is an open-drain output which sinks current when

nMSTR is asserted or when a fault-condition occurs. If interrupts are not masked.

nMSTR

Master Enable Input. Drive nMSTR to GA or to a logic low to enable the IC.

OUT3

Output voltage for REG3. Capable of delivering up to 350mA of output current. Output has high

impedance when disabled.

INL

Power input for REG3, REG4 and REG5. Bypass to GA with a high quality ceramic capacitor

placed as close as possible to the IC.

OUT5

Output voltage for REG5. Capable of delivering up to 250mA of output current. Output has high

impedance when disabled.

OUT4

Output voltage for REG4. Capable of delivering up to 250mA of output current. Output has high

impedance when disabled.

GP1

Power Ground for REG1. Connect GA, GP1 and GP2 together at a single point as close to the

IC as possible.

SW1

Switching Node Output for REG1. Connect this pin to the switching end of the inductor.

VP1

Power Input for REG1. Bypass to GP1 with a high quality ceramic capacitor placed as close as

possible to the IC.

OUT1

Output Feedback Sense for REG1. Connect this pin directly to the output node to connect the

internal feedback network to the output voltage.

14,17

Analog Ground. Connect GA directly to a quiet ground node. Connect GA, GP1 and GP2 to-

gether at a single point as close to the IC as possible.

VSYS

Power Bypass for System Management Circuitry. Bypass to GA with a high quality ceramic

capacitor placed as close as possible to the IC. VSYS is internally connected to the higher volt-

age of either VVIN or VBAT. Do not load VSYS with more than 100µA.

ON1

Enable Control Input for REG1 and REG3. Drive ON1 to VSYS or to a logic high for normal

operation, drive to GA or a logic low to disable REG1 and REG3.

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