MPC5643L datasheet(60/98 Pages) FREESCALE

60 / 98 page

MPC5643L Microcontroller Data Sheet, Rev. 3

Preliminary—Subject to Change Without Notice

Electrical characteristics

Freescale Semiconductor

3.4

Thermal characteristics

VSS_LV_REGCOR

4 SR Internal reference voltage

—

VDD_LV_CORx

SR Internal supply voltage

—

VSS_LV_CORx

SR Internal reference voltage

—

VDD_LV_PLL

SR Internal supply voltage

—

VSS_LV_PLL

SR Internal reference voltage

—

SR Ambient temperature under bias

fCPU

≤ 120 MHz

–40

125

°C

SR Junction temperature under bias

—

–40

150

°C

NOTES:

1 Full functionality cannot be guaranteed when voltage drops below 3.0 V. In particular, ADC electrical characteristics

and I/Os DC electrical specification may not be guaranteed.

2 V

DD_HV_ADR0 and VDD_HV_ADR1 cannot be operated be operated at different voltages, and need to be supplied by

the same voltage source.

3 Can be connected to emitter of external NPN. Low voltage supplies are not under user control. They are produced

by an on-chip voltage regulator.

4 For the device to function properly, the low voltage grounds (V

SS_LV_xxx) must be shorted to high voltage grounds

(VSS_HV_xxx) and the low voltage supply pins (VDD_LV_xxx) must be connected to the external ballast emitter, if one

is used.

Table 10. Thermal characteristics for 144 LQFP package1

NOTES:

1 Thermal characteristics are targets based on simulation that are subject to change per device characterization.

No.

Symbol

Parameter

Conditions

Value Unit

1RθJA

Thermal resistance junction-to-ambient

natural convection2

2 Junction-to-Ambient thermal resistance determined per JEDEC JESD51-3 and JESD51-6. Thermal test board

meets JEDEC specification for this package.

Single layer board – 1s

TBD °C/W

2RθJA

Thermal resistance junction-to-ambient

natural convection2

Four layer board – 2s2p

TBD °C/W

5RθJB

Thermal resistance junction-to-board3

3 Junction-to-Board thermal resistance determined per JEDEC JESD51-8. Thermal test board meets JEDEC

specification for the specified package.

—TBD °C/W

6RθJC

Thermal resistance junction-to-case4

4 Junction-to-Case at the top of the package determined using MIL-STD 883 Method 1012.1. The cold plate

temperature is used for the case temperature. Reported value includes the thermal resistance of the interface layer.

—TBD °C/W

Junction-to-package-top natural convection5

5 Thermal characterization parameter indicating the temperature difference between the package top and the junction

temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter

is written as Psi-JT.

—TBD °C/W

Table 9. Recommended operating conditions (3.3 V) (continued)

Symbol

Parameter

Conditions

Min

Max1

Unit

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