Droop or No-Droop Compensation

(

)

CS

CSINT

OUT

DROOP

DROOP

M droop

R

A

I

V

R

G

´

´

=

´

(2)

DROOP

L L

OUT

V

R

I

-

= -

(3)

Overshoot Reduction (OSR™) Feature

UDG-09079

+

11 V

–

12 V

L

–

1 V

+

1 V

C

Q1 on

Q2 on

Q1

Q2

Because

L

V

I

t

L

D

=

D

, the converter can respond much more quickly to a load step than it can to a load release.

TPS51513

The TPS51513 can be designed to either provide a linear load line (also known as droop) or operate with a flat

load-line (no-droop). This is achieved by the component topology at the DROOP pin.

equation for droop is shown in Equation 2.

where

• R

• A

• I

• GM

The load-line is defined by the change in output voltage vs. the change in current.

The TPS51513 also has the ability to provide an output without a load line. In this case, referring to Figure 2, R2

is left open, and R1 and C2 are populated to break the DC path between DROOP and REF and providing very

high DC loop gain. Means to select R1 and C2 are given in the Design Procedure section.

The problem of overshoot in low duty-cycle synchronous buck converters is well known, and results from the

In Figure 5, with ideal components and the common values of 12-V input and 1-V output, the inductor voltage

Figure 5. Representative Schematic of a Synchronous Converter

The idea of OSR is to turn off the lower FET during a transient load release to force the inductor current through

discharges the inductor more quickly and reduces the peak voltage of the transient overshoot. As a result, less

output capacitance is required to achieve a given output tolerance specification.

Copyright © 2009, Texas Instruments Incorporated

Submit Documentation Feedback

13

Product Folder Link(s) :TPS51513