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AT89LP6440 Datasheet(PDF) 155 Page - ATMEL Corporation

Part # AT89LP6440
Description  8-bit Microcontroller with 64K Bytes In-System Programmable Flash
PDF  194 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT89LP6440 Datasheet(HTML) 155 Page - ATMEL Corporation

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3706A–MICRO–9/09
AT89LP6440 - Preliminary
24. On-Chip Debug System
The AT89LP6440 On-Chip Debug (OCD) System uses a two-wire serial interface to control pro-
gram flow; read, modify, and write the system state; and program the nonvolatile memory. The
OCD System has the following features:
• Complete program flow control
•Read-Modify-Write access to all internal SFRs and data memories
•Four hardware program address breakpoints, plus four program/data address breakpoints
• Unlimited program software breakpoints using BREAK instruction
•Break on change in program memory flow
•Break on stack overflow/underflow
•Break on Watchdog overflow
•Break on reset
• Non-intrusive operation
•Programming of nonvolatile memory
24.1
Physical Interface
The On-Chip Debug System uses a two-wire synchronous serial interface to establish communi-
cation between the target device and the controlling emulator system. The OCD interface is
enabled by clearing the OCD Enable Fuse. The OCD device connections are shown in Figure
24-1. When OCD is enabled, the RST port pin is configured as an input for the Debug Clock
(DCL). Either the XTAL1, XTAL2 or P4.3 pin is configured as a bi-directional data line for the
Debug Data (DDA) depending on the clock source selected. If the Internal RC Oscillator is
selected, XTAL1 is configured as DDA (A).If the External Clock is selected, XTAL2 is configured
as DDA (B). If the Crystal Oscillator is selected, P4.3 is configured as DDA (C).
When designing a system where On-Chip Debug will be used, the following observations must
be considered for correct operation:
TH0
8CH
Table 11-1 on page 50
TH1
8DH
Table 11-1 on page 50
TH2
CDH
Section 12.1 on page 60
TL0
8AH
Table 11-1 on page 50
TL1
8BH
Table 11-1 on page 50
TL2
CCH
Section 12.1 on page 60
TMOD
89H
Table 11-3 on page 54
TWAR
ACH
Table 18-3 on page 111
TWBR
AEH
Table 18-5 on page 112
TWCR
AAH
Table 18-1 on page 111
TWDR
ADH
Table 18-4 on page 112
TWSR
ABH
Table 18-2 on page 111
WDTCON
A7H
Table 21-2 on page 142
WDTRST
A6H
Table 21-3 on page 142
Table 23-1.
Special Function Register Cross Reference



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