ATmega3290P datasheet(106/385 Pages) ATMEL

106 / 385 page

106

8021E–AVR–07/09

ATmega329P/3290P

Table 14-4 shows the COM0A1:0 bit functionality when the WGM01:0 bits are set to fast PWM

mode.

Note:

1. A special case occurs when OCR0A equals TOP and COM0A1 is set. In this case, the com-

pare match is ignored, but the set or clear is done at BOTTOM. See ”Fast PWM Mode” on

page 99 for more details.

Table 14-5 shows the COM0A1:0 bit functionality when the WGM01:0 bits are set to phase cor-

rect PWM mode.

Note:

1. A special case occurs when OCR0A equals TOP and COM0A1 is set. In this case, the com-

pare match is ignored, but the set or clear is done at TOP. See ”Phase Correct PWM Mode” on

page 100 for more details.

Table 14-3.

Compare Output Mode, non-PWM Mode

COM0A1

COM0A0

Description

Normal port operation, OC0A disconnected.

Toggle OC0A on compare match

Clear OC0A on compare match

Set OC0A on compare match

Table 14-4.

Compare Output Mode, Fast PWM Mode

(1)

COM0A1

COM0A0

Description

Normal port operation, OC0A disconnected.

Reserved

Clear OC0A on compare match, set OC0A at BOTTOM

(non-inverting mode)

Set OC0A on compare match, clear OC0A at BOTTOM

(inverting mode)

Table 14-5.

Compare Output Mode, Phase Correct PWM Mode(1)

COM0A1

COM0A0

Description

Normal port operation, OC0A disconnected.

Reserved

Clear OC0A on compare match when up-counting. Set OC0A on

compare match when counting down.

Set OC0A on compare match when up-counting. Clear OC0A on

compare match when counting down.

ATmega3290P Datasheet(PDF) 106 Page - ATMEL Corporation

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