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ATmega3290P Datasheet(PDF) 290 Page - ATMEL Corporation |
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ATmega3290P Datasheet(HTML) 290 Page - ATMEL Corporation |
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290 / 385 page ![]() 290 8021E–AVR–07/09 ATmega329P/3290P Note: 1. For details about these two section, see ”NRWW – No Read-While-Write Section” on page 279 and ”RWW – Read-While- Write Section” on page 279. Note: 1. Z0: should be zero for all SPM commands, byte select for the LPM instruction. See ”Addressing the Flash During Self-Pro- gramming” on page 283 for details about the use of Z-pointer during Self-Programming. 25.9 Register Description 25.9.1 SPMCSR – Store Program Memory Control and Status Register The Store Program Memory Control and Status Register contains the control bits needed to con- trol the Boot Loader operations. • Bit 7 – SPMIE: SPM Interrupt Enable When the SPMIE bit is written to one, and the I-bit in the Status Register is set (one), the SPM ready interrupt will be enabled. The SPM ready Interrupt will be executed as long as the SPMEN bit in the SPMCSR Register is cleared. • Bit 6 – RWWSB: Read-While-Write Section Busy When a Self-Programming (Page Erase or Page Write) operation to the RWW section is initi- ated, the RWWSB will be set (one) by hardware. When the RWWSB bit is set, the RWW section cannot be accessed. The RWWSB bit will be cleared if the RWWSRE bit is written to one after a Table 25-7. Read-While-Write Limit(1) Section Pages Address Read-While-Write section (RWW) 224 0x0000 - 0x37FF No Read-While-Write section (NRWW) 32 0x3800 - 0x3FFF Table 25-8. Explanation of different variables used in Figure 25-3 and the mapping to the Z-pointer(1) Variable Corresponding Z-value Description PCMSB 13 Most significant bit in the Program Counter. (Program Counter is 14 bits PC[13:0]) PAGEMSB 5 Most significant bit which is used to address the words within one page (64 words in a page requires six/seven bits PC [5:0]). ZPCMSB Z14 Bit in Z-register that is mapped to PCMSB. Because Z0 is not used, the ZPCMSB equals PCMSB + 1. ZPAGEMSB Z6 Bit in Z-register that is mapped to PCMSB. Because Z0 is not used, the ZPAGEMSB equals PAGEMSB + 1. PCPAGE PC[13:6] Z14:Z7 Program Counter page address: Page select, for Page Erase and Page Write PCWORD PC[5:0] Z6:Z1 Program Counter word address: Word select, for filling temporary buffer (must be zero during Page Write operation) Bit 7 6 5 4 3 2 1 0 0x37 (0x57) SPMIE RWWSB – RWWSRE BLBSET PGWRT PGERS SPMEN SPMCSR Read/Write R/W R R R/W R/W R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 |
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