ATmega3290P datasheet(295/385 Pages) ATMEL

295 / 385 page

295

8021E–AVR–07/09

ATmega329P/3290P

Notes:

1. The SPIEN Fuse is not accessible in serial programming mode.

2. The default value of BOOTSZ1..0 results in maximum Boot Size. See Table 25-6 on page 289

for details.

3. See ”WDTCR – Watchdog Timer Control Register” on page 49 for details.

4. Never ship a product with the OCDEN Fuse programmed regardless of the setting of Lock bits

and JTAGEN Fuse. A programmed OCDEN Fuse enables some parts of the clock system to

be running in all sleep modes. This may increase the power consumption.

5. If the JTAG interface is left unconnected, the JTAGEN fuse should if possible be disabled. This

to avoid static current at the TDO pin in the JTAG interface.

Notes:

1. The default value of SUT1..0 results in maximum start-up time for the default clock source.

See ”System and Reset Characteristics” on page 330 for details.

2. The default setting of CKSEL3..0 results in internal RC Oscillator @ 8 MHz. See Table 8-6 on

page 31 for details.

3. The CKOUT Fuse allow the system clock to be output on PORTE7. See ”Clock Output Buffer”

on page 33 for details.

4. See ”System Clock Prescaler” on page 33 for details.

The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are locked if

Lock bit1 (LB1) is programmed. Program the Fuse bits before programming the Lock bits.

Table 26-4.

Fuse High Byte

Bit No

Description

Default Value

OCDEN(4)

Enable OCD

1 (unprogrammed, OCD

disabled)

JTAGEN(5)

Enable JTAG

0 (programmed, JTAG

enabled)

SPIEN(1)

Enable Serial Program and Data

Downloading

0 (programmed, SPI

prog. enabled)

WDTON(3)

Watchdog Timer always on

1 (unprogrammed)

EESAVE

EEPROM memory is preserved

through the Chip Erase

1 (unprogrammed,

EEPROM not preserved)

BOOTSZ1

Select Boot Size (see Table 26-7 on

page 297 for details)

0 (programmed)(2)

BOOTSZ0

Select Boot Size (see Table 26-7 on

page 297 for details)

0 (programmed)(2)

BOOTRST

Select Reset Vector

1 (unprogrammed)

Table 26-5.

Fuse Low Byte

Bit No

Description

Default Value

CKDIV8(4)

Divide clock by 8

0 (programmed)

CKOUT(3)

Clock output

1 (unprogrammed)

SUT1

Select start-up time

1 (unprogrammed)(1)

SUT0

Select start-up time

0 (programmed)(1)

CKSEL3

Select Clock source

0 (programmed)(2)

CKSEL2

Select Clock source

0 (programmed)(2)

CKSEL1

Select Clock source

1 (unprogrammed)(2)

CKSEL0

Select Clock source

0 (programmed)(2)

ATmega3290P Datasheet(PDF) 295 Page - ATMEL Corporation

ATmega3290P Datasheet(HTML) 295 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL