ATmega32A datasheet(287/352 Pages) ATMEL

287 / 352 page

287

8155B–AVR–07/09

ATmega32A

• Virtual Flash Page Load Register

• Virtual Flash Page Read Register

26.10.8

Reset Register

The Reset Register is a Test Data Register used to reset the part during programming. It is

required to reset the part before entering programming mode.

A high value in the Reset Register corresponds to pulling the external Reset low. The part is

reset as long as there is a high value present in the Reset Register. Depending on the Fuse set-

tings for the clock options, the part will remain reset for a Reset Time-out Period (refer to “Clock

Sources” on page 26) after releasing the Reset Register. The output from this Data Register is

not latched, so the reset will take place immediately, as shown in Figure 24-2 on page 235.

26.10.9

Programming Enable Register

The Programming Enable Register is a 16-bit register. The contents of this register is compared

to the programming enable signature, binary code 1010_0011_0111_0000. When the contents

of the register is equal to the programming enable signature, programming via the JTAG port is

enabled. The register is reset to 0 on Power-on Reset, and should always be reset when leaving

Programming mode.

Figure 26-13. Programming Enable Register

26.10.10 Programming Command Register

The Programming Command Register is a 15-bit register. This register is used to serially shift in

programming commands, and to serially shift out the result of the previous command, if any. The

JTAG Programming Instruction Set is shown in Table 26-15. The state sequence when shifting

in the programming commands is illustrated in Figure 26-16.

TDI

TDO

ClockDR & PROG_ENABLE

Programming Enable

$A370

ATmega32A Datasheet(PDF) 287 Page - ATMEL Corporation